Change in coreboot[master]: soc/amd/cezanne: Enable GNB IO-APIC _PRT

[Raul Rangel (Code Review)]

Attention is currently required from: Jason Glenesk, Marshall Dawson, Felix Held.
Raul Rangel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/53936 )

Change subject: soc/amd/cezanne: Enable GNB IO-APIC _PRT
......................................................................

soc/amd/cezanne: Enable GNB IO-APIC _PRT

We can now use the GNB IO-APIC.

BUG=b:184766519
TEST=Boot guybrush to OS with `pci=nomsi amd_iommu=off noapic`

Signed-off-by: Raul E Rangel 
Change-Id: I4df5a4583f14044d2efcde3a9de9dd85e898a11d
---
M src/soc/amd/cezanne/pcie_gpp.c
1 file changed, 1 insertion(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/53936/1

diff --git a/src/soc/amd/cezanne/pcie_gpp.c b/src/soc/amd/cezanne/pcie_gpp.c
index 16c6b23..283470b 100644
--- a/src/soc/amd/cezanne/pcie_gpp.c
+++ b/src/soc/amd/cezanne/pcie_gpp.c
@@ -65,8 +65,7 @@
    acpigen_write_ADR_pci_device(dev);
    acpigen_write_STA(acpi_device_status(dev));

-	/* b/187083211 - Enable GNB IO-APIC */
-	acpigen_write_pci_FCH_PRT(dev);
+	acpigen_write_pci_GNB_PRT(dev);

acpigen_pop_len(); /* Device */
    acpigen_pop_len(); /* Scope */