Change in coreboot[master]: mb/google/dedede: refactor DPTF section for simpler overrides
Sumeet R Pawnikar has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46090 )
Change subject: mb/google/dedede: refactor DPTF section for simpler overrides ......................................................................
mb/google/dedede: refactor DPTF section for simpler overrides
Refactor DPTF section of code under the baseboard devicetree and overridetree. This makes override mechanism more simpler, because not all the DPTF fields need to be overridden.
BUG=None BRANCH=None TEST=Built and tested on dedede system
Change-Id: I8e7cfe60c010ed4c07f9089325b289519e861f84 Signed-off-by: Sumeet R Pawnikar sumeet.r.pawnikar@intel.com --- M src/mainboard/google/dedede/variants/baseboard/devicetree.cb M src/mainboard/google/dedede/variants/drawcia/overridetree.cb 2 files changed, 69 insertions(+), 45 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/46090/1
diff --git a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb index 1f72eb1..4bb0a3c 100644 --- a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb @@ -184,27 +184,39 @@ device pci 00.0 on end # Host Bridge device pci 02.0 on end # Integrated Graphics Device device pci 04.0 on + # Default DPTF Policy for all Dedede boards if not overridden chip drivers/intel/dptf - register "policies.passive[0]" = "DPTF_PASSIVE(CPU, CPU, 90, 10000)" - register "policies.passive[1]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 80, 60000)" - register "policies.passive[2]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 55, 15000)" + ## Passive Policy + register "policies.passive" = "{ + [0] = DPTF_PASSIVE(CPU, CPU, 90, 10000), + [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 80, 60000), + [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 55, 15000) + }"
- register "policies.critical[0]" = "DPTF_CRITICAL(CPU, 105, SHUTDOWN)" - register "policies.critical[1]" = "DPTF_CRITICAL(TEMP_SENSOR_0, 90, SHUTDOWN)" - register "policies.critical[2]" = "DPTF_CRITICAL(TEMP_SENSOR_1, 80, SHUTDOWN)" + ## Critical Policy + register "policies.critical" = "{ + [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN), + [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 90, SHUTDOWN), + [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 80, SHUTDOWN) + }"
- register "controls.power_limits.pl1" = "{ - .min_power = 3000, - .max_power = 6000, - .time_window_min = 1 * MSECS_PER_SEC, - .time_window_max = 1 * MSECS_PER_SEC, - .granularity = 200,}" - register "controls.power_limits.pl2" = "{ - .min_power = 6000, - .max_power = 20000, - .time_window_min = 1 * MSECS_PER_SEC, - .time_window_max = 1 * MSECS_PER_SEC, - .granularity = 1000,}" + ## Power Limits Control + register "controls.power_limits" = "{ + .pl1 = { + .min_power = 3000, + .max_power = 6000, + .time_window_min = 1 * MSECS_PER_SEC, + .time_window_max = 1 * MSECS_PER_SEC, + .granularity = 200, + }, + .pl2 = { + .min_power = 6000, + .max_power = 20000, + .time_window_min = 1 * MSECS_PER_SEC, + .time_window_max = 1 * MSECS_PER_SEC, + .granularity = 1000, + } + }"
register "options.tsr[0].desc" = ""Memory"" register "options.tsr[1].desc" = ""Ambient"" diff --git a/src/mainboard/google/dedede/variants/drawcia/overridetree.cb b/src/mainboard/google/dedede/variants/drawcia/overridetree.cb index fa10152..685aeb5 100644 --- a/src/mainboard/google/dedede/variants/drawcia/overridetree.cb +++ b/src/mainboard/google/dedede/variants/drawcia/overridetree.cb @@ -67,42 +67,54 @@ device domain 0 on device pci 04.0 on chip drivers/intel/dptf - + # Default DPTF Policy for all Volteer boards if not overridden register "options.tsr[0].desc" = ""Memory"" register "options.tsr[1].desc" = ""Ambient"" register "options.tsr[2].desc" = ""Charger"" register "options.tsr[3].desc" = ""5V regulator""
- register "policies.passive[0]" = "DPTF_PASSIVE(CPU, CPU, 80, 1000)" - register "policies.passive[1]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 70, 4000)" - register "policies.passive[2]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 75, 1000)" - register "policies.passive[3]" = "DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 75, 5000)" - register "policies.passive[4]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_3, 60, 1000)" + ## Passive Policy + register "policies.passive" = "{ + [0] = DPTF_PASSIVE(CPU, CPU, 80, 1000), + [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 70, 4000), + [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 75, 1000), + [3] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 75, 5000), + [4] = DPTF_PASSIVE(CPU, TEMP_SENSOR_3, 60, 1000) + }"
- register "policies.critical[0]" = "DPTF_CRITICAL(CPU, 119, SHUTDOWN)" - register "policies.critical[1]" = "DPTF_CRITICAL(TEMP_SENSOR_0, 115, SHUTDOWN)" - register "policies.critical[2]" = "DPTF_CRITICAL(TEMP_SENSOR_1, 115, SHUTDOWN)" - register "policies.critical[3]" = "DPTF_CRITICAL(TEMP_SENSOR_2, 115, SHUTDOWN)" - register "policies.critical[4]" = "DPTF_CRITICAL(TEMP_SENSOR_3, 115, SHUTDOWN)" + ## Critical Policy + register "policies.critical" = "{ + [0] = DPTF_CRITICAL(CPU, 119, SHUTDOWN), + [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 115, SHUTDOWN), + [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 115, SHUTDOWN), + [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 115, SHUTDOWN), + [4] = DPTF_CRITICAL(TEMP_SENSOR_3, 115, SHUTDOWN) + }"
- register "controls.power_limits.pl1" = "{ - .min_power = 4800, - .max_power = 6000, - .time_window_min = 1 * MSECS_PER_SEC, - .time_window_max = 1 * MSECS_PER_SEC, - .granularity = 200,}" - register "controls.power_limits.pl2" = "{ - .min_power = 6000, - .max_power = 20000, - .time_window_min = 1 * MSECS_PER_SEC, - .time_window_max = 1 * MSECS_PER_SEC, - .granularity = 1000,}" + register "controls.power_limits" = "{ + .pl1 = { + .min_power = 4800, + .max_power = 6000, + .time_window_min = 1 * MSECS_PER_SEC, + .time_window_max = 1 * MSECS_PER_SEC, + .granularity = 200, + }, + .pl2 = { + .min_power = 6000, + .max_power = 20000, + .time_window_min = 1 * MSECS_PER_SEC, + .time_window_max = 1 * MSECS_PER_SEC, + .granularity = 1000, + } + }"
## Charger Performance Control (Control, mA) - register "controls.charger_perf[0]" = "{ 255, 3000 }" - register "controls.charger_perf[1]" = "{ 24, 1500 }" - register "controls.charger_perf[2]" = "{ 16, 1000 }" - register "controls.charger_perf[3]" = "{ 8, 500 }" + register "controls.charger_perf" = "{ + [0] = { 255, 3000 }, + [1] = { 24, 1500 }, + [2] = { 16, 1000 }, + [3] = { 8, 500 } + }"
device generic 0 on end end
Hello build bot (Jenkins), Furquan Shaikh, Tim Wawrzynczak, Duncan Laurie, Aaron Durbin, Karthik Ramasubramanian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46090
to look at the new patch set (#2).
Change subject: mb/google/dedede: refactor DPTF section for simpler overrides ......................................................................
mb/google/dedede: refactor DPTF section for simpler overrides
Refactor DPTF section of code under the baseboard devicetree and overridetree. This makes override mechanism more simpler, because not all the DPTF fields need to be overridden.
BUG=None BRANCH=None TEST=Built and tested on dedede system
Change-Id: I8e7cfe60c010ed4c07f9089325b289519e861f84 Signed-off-by: Sumeet R Pawnikar sumeet.r.pawnikar@intel.com --- M src/mainboard/google/dedede/variants/baseboard/devicetree.cb M src/mainboard/google/dedede/variants/drawcia/overridetree.cb 2 files changed, 69 insertions(+), 45 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/46090/2
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46090 )
Change subject: mb/google/dedede: refactor DPTF section for simpler overrides ......................................................................
Patch Set 2: Code-Review+1
(1 comment)
https://review.coreboot.org/c/coreboot/+/46090/2/src/mainboard/google/dedede... File src/mainboard/google/dedede/variants/drawcia/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/46090/2/src/mainboard/google/dedede... PS2, Line 78: [0] = DPTF_PASSIVE(CPU, CPU, 80, 1000), : [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 70, 4000), : [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 75, 1000), : [3] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 75, 5000), : [4] = DPTF_PASSIVE(CPU, TEMP_SENSOR_3, 60, 1000) nit: this would look a little cleaner if each column lined up
Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46090 )
Change subject: mb/google/dedede: refactor DPTF section for simpler overrides ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/46090/2/src/mainboard/google/dedede... File src/mainboard/google/dedede/variants/drawcia/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/46090/2/src/mainboard/google/dedede... PS2, Line 102: .pl2 = { : .min_power = 6000, : .max_power = 20000, : .time_window_min = 1 * MSECS_PER_SEC, : .time_window_max = 1 * MSECS_PER_SEC, : .granularity = 1000, : } I am a little lost. The pl2 here is same as pl2 in baseboard devicetree. If the purpose of this CL is not to override all the DPTF fields, why is it added here. Same for options.tsr[0..1].desc
Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46090 )
Change subject: mb/google/dedede: refactor DPTF section for simpler overrides ......................................................................
Patch Set 2:
(2 comments)
https://review.coreboot.org/c/coreboot/+/46090/2/src/mainboard/google/dedede... File src/mainboard/google/dedede/variants/drawcia/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/46090/2/src/mainboard/google/dedede... PS2, Line 78: [0] = DPTF_PASSIVE(CPU, CPU, 80, 1000), : [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 70, 4000), : [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 75, 1000), : [3] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 75, 5000), : [4] = DPTF_PASSIVE(CPU, TEMP_SENSOR_3, 60, 1000)
nit: this would look a little cleaner if each column lined up
Ack
https://review.coreboot.org/c/coreboot/+/46090/2/src/mainboard/google/dedede... PS2, Line 102: .pl2 = { : .min_power = 6000, : .max_power = 20000, : .time_window_min = 1 * MSECS_PER_SEC, : .time_window_max = 1 * MSECS_PER_SEC, : .granularity = 1000, : }
I am a little lost. The pl2 here is same as pl2 in baseboard devicetree. […]
As per my observations, we need pl2 entries here otherwise it's taking zeros for these entries. Regarding tsr[0..1].desc , this variant has more number of sensors with specific usage for this design. So we need these entries.
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46090 )
Change subject: mb/google/dedede: refactor DPTF section for simpler overrides ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/46090/2/src/mainboard/google/dedede... File src/mainboard/google/dedede/variants/drawcia/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/46090/2/src/mainboard/google/dedede... PS2, Line 102: .pl2 = { : .min_power = 6000, : .max_power = 20000, : .time_window_min = 1 * MSECS_PER_SEC, : .time_window_max = 1 * MSECS_PER_SEC, : .granularity = 1000, : }
As per my observations, we need pl2 entries here otherwise it's taking zeros for these entries. […]
If you wanted, you could separate out pl1 and pl2 in the override tree like so: ``` register "controls.power_limits.pl1" = "{ .min_power = 4800, ... }," register "controls.power_limits.pl2" = "{ .min_power = 6000, ... }," ```
that way each of them can be individually overridden (or not) in the override trees. Right now, you have to specify either both or none (and take the baseboard default). Up to you.
Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46090 )
Change subject: mb/google/dedede: refactor DPTF section for simpler overrides ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/46090/2/src/mainboard/google/dedede... File src/mainboard/google/dedede/variants/drawcia/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/46090/2/src/mainboard/google/dedede... PS2, Line 102: .pl2 = { : .min_power = 6000, : .max_power = 20000, : .time_window_min = 1 * MSECS_PER_SEC, : .time_window_max = 1 * MSECS_PER_SEC, : .granularity = 1000, : }
If you wanted, you could separate out pl1 and pl2 in the override tree like so: […]
Thanks Tim for this info. For the same reason, I have specified both pl1 and pl2 above.
Hello build bot (Jenkins), Furquan Shaikh, Tim Wawrzynczak, Duncan Laurie, Aaron Durbin, Karthik Ramasubramanian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46090
to look at the new patch set (#3).
Change subject: mb/google/dedede: refactor DPTF section for simpler overrides ......................................................................
mb/google/dedede: refactor DPTF section for simpler overrides
Refactor DPTF section of code under the baseboard devicetree and overridetree. This makes override mechanism more simpler, because not all the DPTF fields need to be overridden.
BUG=None BRANCH=None TEST=Built and tested on dedede system
Change-Id: I8e7cfe60c010ed4c07f9089325b289519e861f84 Signed-off-by: Sumeet R Pawnikar sumeet.r.pawnikar@intel.com --- M src/mainboard/google/dedede/variants/baseboard/devicetree.cb M src/mainboard/google/dedede/variants/drawcia/overridetree.cb 2 files changed, 69 insertions(+), 45 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/46090/3
Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46090 )
Change subject: mb/google/dedede: refactor DPTF section for simpler overrides ......................................................................
Patch Set 3:
(2 comments)
https://review.coreboot.org/c/coreboot/+/46090/2/src/mainboard/google/dedede... File src/mainboard/google/dedede/variants/drawcia/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/46090/2/src/mainboard/google/dedede... PS2, Line 78: [0] = DPTF_PASSIVE(CPU, CPU, 80, 1000), : [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 70, 4000), : [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 75, 1000), : [3] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 75, 5000), : [4] = DPTF_PASSIVE(CPU, TEMP_SENSOR_3, 60, 1000)
Ack
Done
https://review.coreboot.org/c/coreboot/+/46090/2/src/mainboard/google/dedede... PS2, Line 102: .pl2 = { : .min_power = 6000, : .max_power = 20000, : .time_window_min = 1 * MSECS_PER_SEC, : .time_window_max = 1 * MSECS_PER_SEC, : .granularity = 1000, : }
Thanks Tim for this info. For the same reason, I have specified both pl1 and pl2 above.
Done
Hello build bot (Jenkins), Furquan Shaikh, Tim Wawrzynczak, Duncan Laurie, Aaron Durbin, Karthik Ramasubramanian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46090
to look at the new patch set (#4).
Change subject: mb/google/dedede: refactor DPTF section for simpler overrides ......................................................................
mb/google/dedede: refactor DPTF section for simpler overrides
Refactor DPTF section of code under the baseboard devicetree and overridetree. This makes override mechanism more simpler, because not all the DPTF fields need to be overridden.
BUG=None BRANCH=None TEST=Built and tested on dedede system
Change-Id: I8e7cfe60c010ed4c07f9089325b289519e861f84 Signed-off-by: Sumeet R Pawnikar sumeet.r.pawnikar@intel.com --- M src/mainboard/google/dedede/variants/baseboard/devicetree.cb M src/mainboard/google/dedede/variants/drawcia/overridetree.cb 2 files changed, 69 insertions(+), 45 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/46090/4
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46090 )
Change subject: mb/google/dedede: refactor DPTF section for simpler overrides ......................................................................
Patch Set 4: Code-Review+2
Tim Wawrzynczak has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46090 )
Change subject: mb/google/dedede: refactor DPTF section for simpler overrides ......................................................................
mb/google/dedede: refactor DPTF section for simpler overrides
Refactor DPTF section of code under the baseboard devicetree and overridetree. This makes override mechanism more simpler, because not all the DPTF fields need to be overridden.
BUG=None BRANCH=None TEST=Built and tested on dedede system
Change-Id: I8e7cfe60c010ed4c07f9089325b289519e861f84 Signed-off-by: Sumeet R Pawnikar sumeet.r.pawnikar@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/46090 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Tim Wawrzynczak twawrzynczak@chromium.org --- M src/mainboard/google/dedede/variants/baseboard/devicetree.cb M src/mainboard/google/dedede/variants/drawcia/overridetree.cb 2 files changed, 69 insertions(+), 45 deletions(-)
Approvals: build bot (Jenkins): Verified Tim Wawrzynczak: Looks good to me, approved
diff --git a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb index b2ed21a..2b7a513 100644 --- a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb @@ -189,27 +189,39 @@ device pci 00.0 on end # Host Bridge device pci 02.0 on end # Integrated Graphics Device device pci 04.0 on + # Default DPTF Policy for all Dedede boards if not overridden chip drivers/intel/dptf - register "policies.passive[0]" = "DPTF_PASSIVE(CPU, CPU, 90, 10000)" - register "policies.passive[1]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 80, 60000)" - register "policies.passive[2]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 55, 15000)" + ## Passive Policy + register "policies.passive" = "{ + [0] = DPTF_PASSIVE(CPU, CPU, 90, 10000), + [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 80, 60000), + [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 55, 15000) + }"
- register "policies.critical[0]" = "DPTF_CRITICAL(CPU, 105, SHUTDOWN)" - register "policies.critical[1]" = "DPTF_CRITICAL(TEMP_SENSOR_0, 90, SHUTDOWN)" - register "policies.critical[2]" = "DPTF_CRITICAL(TEMP_SENSOR_1, 80, SHUTDOWN)" + ## Critical Policy + register "policies.critical" = "{ + [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN), + [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 90, SHUTDOWN), + [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 80, SHUTDOWN) + }"
- register "controls.power_limits.pl1" = "{ - .min_power = 3000, - .max_power = 6000, - .time_window_min = 1 * MSECS_PER_SEC, - .time_window_max = 1 * MSECS_PER_SEC, - .granularity = 200,}" - register "controls.power_limits.pl2" = "{ - .min_power = 6000, - .max_power = 20000, - .time_window_min = 1 * MSECS_PER_SEC, - .time_window_max = 1 * MSECS_PER_SEC, - .granularity = 1000,}" + ## Power Limits Control + register "controls.power_limits" = "{ + .pl1 = { + .min_power = 3000, + .max_power = 6000, + .time_window_min = 1 * MSECS_PER_SEC, + .time_window_max = 1 * MSECS_PER_SEC, + .granularity = 200, + }, + .pl2 = { + .min_power = 6000, + .max_power = 20000, + .time_window_min = 1 * MSECS_PER_SEC, + .time_window_max = 1 * MSECS_PER_SEC, + .granularity = 1000, + } + }"
register "options.tsr[0].desc" = ""Memory"" register "options.tsr[1].desc" = ""Ambient"" diff --git a/src/mainboard/google/dedede/variants/drawcia/overridetree.cb b/src/mainboard/google/dedede/variants/drawcia/overridetree.cb index 715da7a..044ff08 100644 --- a/src/mainboard/google/dedede/variants/drawcia/overridetree.cb +++ b/src/mainboard/google/dedede/variants/drawcia/overridetree.cb @@ -67,42 +67,54 @@ device domain 0 on device pci 04.0 on chip drivers/intel/dptf - + # Default DPTF Policy for all drawcia boards if not overridden register "options.tsr[0].desc" = ""Memory"" register "options.tsr[1].desc" = ""Ambient"" register "options.tsr[2].desc" = ""Charger"" register "options.tsr[3].desc" = ""5V regulator""
- register "policies.passive[0]" = "DPTF_PASSIVE(CPU, CPU, 80, 1000)" - register "policies.passive[1]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 70, 4000)" - register "policies.passive[2]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 51, 1000)" - register "policies.passive[3]" = "DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 75, 5000)" - register "policies.passive[4]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_3, 60, 1000)" + ## Passive Policy + register "policies.passive" = "{ + [0] = DPTF_PASSIVE(CPU, CPU, 80, 1000), + [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 70, 4000), + [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 51, 1000), + [3] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 75, 5000), + [4] = DPTF_PASSIVE(CPU, TEMP_SENSOR_3, 60, 1000) + }"
- register "policies.critical[0]" = "DPTF_CRITICAL(CPU, 119, SHUTDOWN)" - register "policies.critical[1]" = "DPTF_CRITICAL(TEMP_SENSOR_0, 115, SHUTDOWN)" - register "policies.critical[2]" = "DPTF_CRITICAL(TEMP_SENSOR_1, 115, SHUTDOWN)" - register "policies.critical[3]" = "DPTF_CRITICAL(TEMP_SENSOR_2, 115, SHUTDOWN)" - register "policies.critical[4]" = "DPTF_CRITICAL(TEMP_SENSOR_3, 115, SHUTDOWN)" + ## Critical Policy + register "policies.critical" = "{ + [0] = DPTF_CRITICAL(CPU, 119, SHUTDOWN), + [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 115, SHUTDOWN), + [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 115, SHUTDOWN), + [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 115, SHUTDOWN), + [4] = DPTF_CRITICAL(TEMP_SENSOR_3, 115, SHUTDOWN) + }"
- register "controls.power_limits.pl1" = "{ - .min_power = 4800, - .max_power = 6000, - .time_window_min = 1 * MSECS_PER_SEC, - .time_window_max = 1 * MSECS_PER_SEC, - .granularity = 200,}" - register "controls.power_limits.pl2" = "{ - .min_power = 6000, - .max_power = 20000, - .time_window_min = 1 * MSECS_PER_SEC, - .time_window_max = 1 * MSECS_PER_SEC, - .granularity = 1000,}" + register "controls.power_limits" = "{ + .pl1 = { + .min_power = 4800, + .max_power = 6000, + .time_window_min = 1 * MSECS_PER_SEC, + .time_window_max = 1 * MSECS_PER_SEC, + .granularity = 200, + }, + .pl2 = { + .min_power = 6000, + .max_power = 20000, + .time_window_min = 1 * MSECS_PER_SEC, + .time_window_max = 1 * MSECS_PER_SEC, + .granularity = 1000, + } + }"
## Charger Performance Control (Control, mA) - register "controls.charger_perf[0]" = "{ 255, 3000 }" - register "controls.charger_perf[1]" = "{ 24, 1500 }" - register "controls.charger_perf[2]" = "{ 16, 1000 }" - register "controls.charger_perf[3]" = "{ 8, 500 }" + register "controls.charger_perf" = "{ + [0] = { 255, 3000 }, + [1] = { 24, 1500 }, + [2] = { 16, 1000 }, + [3] = { 8, 500 } + }"
device generic 0 on end end
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Karthik Ramasubramanian (Code Review) -
Sumeet R Pawnikar (Code Review)
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Tim Wawrzynczak (Code Review)