Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38199 )
Change subject: [WIP] drivers/pc80/rtc: Reorganize prototypes ......................................................................
[WIP] drivers/pc80/rtc: Reorganize prototypes
Change-Id: Idea18f437c31ebe83dd61a185e614106a1f8f976 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- A src/arch/x86/include/arch/post.h M src/include/console/console.h M src/include/pc80/mc146818rtc.h M src/lib/bootblock.c 4 files changed, 41 insertions(+), 25 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/38199/1
diff --git a/src/arch/x86/include/arch/post.h b/src/arch/x86/include/arch/post.h new file mode 100644 index 0000000..7bdf6a6 --- /dev/null +++ b/src/arch/x86/include/arch/post.h @@ -0,0 +1,37 @@ +/* + * This file is part of the coreboot project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __ARCH_POST_H__ +#define __ARCH_POST_H__ + +#include <stdint.h> + +void cmos_post_init(void); +void cmos_post_code(u8 value); +void cmos_post_extra(u32 value); +void cmos_post_path(const struct device *dev); +int cmos_post_previous(u8 *code, u32 *extra); + +static inline void post_log_path(const struct device *dev) +{ + if (CONFIG(CMOS_POST) && dev) + cmos_post_path(dev); +} + +static inline void post_log_clear(void) +{ + if (CONFIG(CMOS_POST)) + cmos_post_extra(0); +} + +#endif diff --git a/src/include/console/console.h b/src/include/console/console.h index 94642cd..12fb77a 100644 --- a/src/include/console/console.h +++ b/src/include/console/console.h @@ -19,6 +19,7 @@ #include <stdint.h> #include <arch/cpu.h> #include <console/post_codes.h> +#include <console/vtxprintf.h>
/* console.h is supposed to provide the log levels defined in here: */ #include <commonlib/loglevel.h> @@ -26,31 +27,10 @@ #define RAM_DEBUG (CONFIG(DEBUG_RAM_SETUP) ? BIOS_DEBUG : BIOS_NEVER) #define RAM_SPEW (CONFIG(DEBUG_RAM_SETUP) ? BIOS_SPEW : BIOS_NEVER)
-#include <console/vtxprintf.h> - -struct device; - void post_code(u8 value); -void arch_post_code(u8 value); -void cmos_post_code(u8 value); -void cmos_post_extra(u32 value); -void cmos_post_path(const struct device *dev); -int cmos_post_previous(u8 *code, u32 *extra); - -static inline void post_log_path(const struct device *dev) -{ - if (CONFIG(CMOS_POST) && dev) - cmos_post_path(dev); -} - -static inline void post_log_clear(void) -{ - if (CONFIG(CMOS_POST)) - cmos_post_extra(0); -} - -/* this function is weak and can be overridden by a mainboard function. */ void mainboard_post(u8 value); +void arch_post_code(u8 value); + void __noreturn die(const char *fmt, ...); #define die_with_post_code(value, fmt, ...) \ do { post_code(value); die(fmt, ##__VA_ARGS__); } while (0) diff --git a/src/include/pc80/mc146818rtc.h b/src/include/pc80/mc146818rtc.h index 353a09b..c9e054b 100644 --- a/src/include/pc80/mc146818rtc.h +++ b/src/include/pc80/mc146818rtc.h @@ -183,6 +183,5 @@
#endif /* CONFIG_ARCH_X86 */
-void cmos_post_init(void);
#endif /* PC80_MC146818RTC_H */ diff --git a/src/lib/bootblock.c b/src/lib/bootblock.c index 386f4e3..5995c45 100644 --- a/src/lib/bootblock.c +++ b/src/lib/bootblock.c @@ -15,11 +15,11 @@ */
#include <arch/exception.h> +#include <arch/post.h> #include <bootblock_common.h> #include <console/console.h> #include <delay.h> #include <option.h> -#include <pc80/mc146818rtc.h> #include <program_loading.h> #include <symbols.h> #include <timestamp.h>
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/38199
to look at the new patch set (#4).
Change subject: [WIP] drivers/pc80/rtc: Reorganize prototypes ......................................................................
[WIP] drivers/pc80/rtc: Reorganize prototypes
Change-Id: Idea18f437c31ebe83dd61a185e614106a1f8f976 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/arch/x86/cpu.c M src/arch/x86/post.c M src/device/device.c M src/include/console/console.h M src/include/pc80/mc146818rtc.h A src/include/post.h M src/lib/bootblock.c 7 files changed, 45 insertions(+), 25 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/38199/4
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/38199
to look at the new patch set (#7).
Change subject: [WIP] drivers/pc80/rtc: Reorganize prototypes ......................................................................
[WIP] drivers/pc80/rtc: Reorganize prototypes
Change-Id: Idea18f437c31ebe83dd61a185e614106a1f8f976 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/arch/x86/cpu.c M src/arch/x86/post.c M src/device/device.c M src/include/console/console.h M src/include/pc80/mc146818rtc.h A src/include/post.h M src/lib/bootblock.c 7 files changed, 35 insertions(+), 25 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/38199/7
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/38199
to look at the new patch set (#8).
Change subject: drivers/pc80/rtc: Reorganize prototypes ......................................................................
drivers/pc80/rtc: Reorganize prototypes
Change-Id: Idea18f437c31ebe83dd61a185e614106a1f8f976 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/arch/x86/cpu.c M src/arch/x86/post.c M src/device/device.c M src/drivers/elog/elog.c M src/include/console/console.h M src/include/pc80/mc146818rtc.h A src/include/post.h M src/lib/bootblock.c 8 files changed, 36 insertions(+), 28 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/38199/8
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/38199
to look at the new patch set (#9).
Change subject: drivers/pc80/rtc: Reorganize prototypes ......................................................................
drivers/pc80/rtc: Reorganize prototypes
Change-Id: Idea18f437c31ebe83dd61a185e614106a1f8f976 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/arch/x86/cpu.c M src/arch/x86/post.c M src/device/device.c M src/drivers/elog/elog.c M src/drivers/pc80/rtc/post.c M src/include/console/console.h M src/include/pc80/mc146818rtc.h A src/include/post.h M src/lib/bootblock.c M src/soc/intel/xeon_sp/skx/chip.c 10 files changed, 38 insertions(+), 28 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/38199/9
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38199 )
Change subject: drivers/pc80/rtc: Reorganize prototypes ......................................................................
Patch Set 9: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/38199 )
Change subject: drivers/pc80/rtc: Reorganize prototypes ......................................................................
drivers/pc80/rtc: Reorganize prototypes
Change-Id: Idea18f437c31ebe83dd61a185e614106a1f8f976 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/38199 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com --- M src/arch/x86/cpu.c M src/arch/x86/post.c M src/device/device.c M src/drivers/elog/elog.c M src/drivers/pc80/rtc/post.c M src/include/console/console.h M src/include/pc80/mc146818rtc.h A src/include/post.h M src/lib/bootblock.c M src/soc/intel/xeon_sp/skx/chip.c 10 files changed, 38 insertions(+), 28 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/src/arch/x86/cpu.c b/src/arch/x86/cpu.c index 8f8fdc1..1ee8fb3 100644 --- a/src/arch/x86/cpu.c +++ b/src/arch/x86/cpu.c @@ -5,6 +5,7 @@ #include <boot/coreboot_tables.h> #include <console/console.h> #include <cpu/cpu.h> +#include <post.h> #include <string.h> #include <cpu/x86/mp.h> #include <cpu/x86/lapic.h> diff --git a/src/arch/x86/post.c b/src/arch/x86/post.c index 0aaf9b7..ec185c7 100644 --- a/src/arch/x86/post.c +++ b/src/arch/x86/post.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* This file is part of the coreboot project. */
+#include <post.h> #include <stdint.h> #include <console/console.h> #include <arch/io.h> diff --git a/src/device/device.c b/src/device/device.c index cc1b37d..a5d223b 100644 --- a/src/device/device.c +++ b/src/device/device.c @@ -9,6 +9,7 @@ #include <device/device.h> #include <device/pci_def.h> #include <device/pci_ids.h> +#include <post.h> #include <stdlib.h> #include <string.h> #include <smp/spinlock.h> diff --git a/src/drivers/elog/elog.c b/src/drivers/elog/elog.c index 1d4b135..ab86f38 100644 --- a/src/drivers/elog/elog.c +++ b/src/drivers/elog/elog.c @@ -7,14 +7,12 @@ #include <bootstate.h> #include <cbmem.h> #include <console/console.h> -#if CONFIG(ARCH_X86) -#include <pc80/mc146818rtc.h> -#endif #include <bcd.h> #include <boot_device.h> #include <commonlib/region.h> #include <fmap.h> #include <lib.h> +#include <post.h> #include <rtc.h> #include <smbios.h> #include <stdint.h> diff --git a/src/drivers/pc80/rtc/post.c b/src/drivers/pc80/rtc/post.c index f993b96..842deb7 100644 --- a/src/drivers/pc80/rtc/post.c +++ b/src/drivers/pc80/rtc/post.c @@ -2,6 +2,7 @@ /* This file is part of the coreboot project. */
#include <stdint.h> +#include <post.h> #include <console/console.h> #include <device/device.h> #include <pc80/mc146818rtc.h> diff --git a/src/include/console/console.h b/src/include/console/console.h index 95c0e7f..fdc48da 100644 --- a/src/include/console/console.h +++ b/src/include/console/console.h @@ -7,6 +7,7 @@ #include <stdint.h> #include <arch/cpu.h> #include <console/post_codes.h> +#include <console/vtxprintf.h>
/* console.h is supposed to provide the log levels defined in here: */ #include <commonlib/loglevel.h> @@ -14,31 +15,10 @@ #define RAM_DEBUG (CONFIG(DEBUG_RAM_SETUP) ? BIOS_DEBUG : BIOS_NEVER) #define RAM_SPEW (CONFIG(DEBUG_RAM_SETUP) ? BIOS_SPEW : BIOS_NEVER)
-#include <console/vtxprintf.h> - -struct device; - void post_code(u8 value); -void arch_post_code(u8 value); -void cmos_post_code(u8 value); -void cmos_post_extra(u32 value); -void cmos_post_path(const struct device *dev); -int cmos_post_previous_boot(u8 *code, u32 *extra); - -static inline void post_log_path(const struct device *dev) -{ - if (CONFIG(CMOS_POST) && dev) - cmos_post_path(dev); -} - -static inline void post_log_clear(void) -{ - if (CONFIG(CMOS_POST)) - cmos_post_extra(0); -} - -/* this function is weak and can be overridden by a mainboard function. */ void mainboard_post(u8 value); +void arch_post_code(u8 value); + void __noreturn die(const char *fmt, ...); #define die_with_post_code(value, fmt, ...) \ do { post_code(value); die(fmt, ##__VA_ARGS__); } while (0) diff --git a/src/include/pc80/mc146818rtc.h b/src/include/pc80/mc146818rtc.h index 353a09b..c9e054b 100644 --- a/src/include/pc80/mc146818rtc.h +++ b/src/include/pc80/mc146818rtc.h @@ -183,6 +183,5 @@
#endif /* CONFIG_ARCH_X86 */
-void cmos_post_init(void);
#endif /* PC80_MC146818RTC_H */ diff --git a/src/include/post.h b/src/include/post.h new file mode 100644 index 0000000..5c1e816 --- /dev/null +++ b/src/include/post.h @@ -0,0 +1,28 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* This file is part of the coreboot project. */ + +#ifndef __POST_H__ +#define __POST_H__ + +#include <stdint.h> +#include <device/device.h> + +void cmos_post_init(void); +void cmos_post_code(u8 value); +void cmos_post_extra(u32 value); +void cmos_post_path(const struct device *dev); +int cmos_post_previous_boot(u8 *code, u32 *extra); + +static inline void post_log_path(const struct device *dev) +{ + if (CONFIG(CMOS_POST) && dev) + cmos_post_path(dev); +} + +static inline void post_log_clear(void) +{ + if (CONFIG(CMOS_POST)) + cmos_post_extra(0); +} + +#endif diff --git a/src/lib/bootblock.c b/src/lib/bootblock.c index 565d619..b3d4860 100644 --- a/src/lib/bootblock.c +++ b/src/lib/bootblock.c @@ -6,7 +6,7 @@ #include <console/console.h> #include <delay.h> #include <option.h> -#include <pc80/mc146818rtc.h> +#include <post.h> #include <program_loading.h> #include <symbols.h> #include <timestamp.h> diff --git a/src/soc/intel/xeon_sp/skx/chip.c b/src/soc/intel/xeon_sp/skx/chip.c index be452a0..9a9c455 100644 --- a/src/soc/intel/xeon_sp/skx/chip.c +++ b/src/soc/intel/xeon_sp/skx/chip.c @@ -15,6 +15,7 @@
#include <cbfs.h> #include <assert.h> +#include <post.h> #include <device/pci.h> #include <soc/acpi.h> #include <soc/ramstage.h>
-
Angel Pons (Code Review) -
Kyösti Mälkki (Code Review)
-
Patrick Georgi (Code Review)