Change in coreboot[master]: soc/intel/alderlake: Enable VT-d

[Subrata Banik (Code Review)]

Attention is currently required from: Furquan Shaikh, Maulik V Vaghela, Tim Wawrzynczak, Meera Ravindranath, Ronak Kanabar, Patrick Rudolph.
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51849 )

Change subject: soc/intel/alderlake: Enable VT-d
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Patch Set 5:

(1 comment)

File src/soc/intel/alderlake/romstage/fsp_params.c:

https://review.coreboot.org/c/coreboot/+/51849/comment/c63a0df9_04d141d0 
PS5, Line 204: 		#if (GFXVT_BASE_ADDRESS == 0)
             : 			#error "Error: GFXVT_BASE_ADDRESS should be non-zero for enabling VT-d!"
             : 		#endif
> Sure, so if you check that the user wants VT-d enabled (by checking that `InternalGfx == 1`), and yo […]

perfect Tim. @Meera, please modify the code accordingly