Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37886 )
Change subject: arch/x86: Remove <arch/cbfs.h> ......................................................................
arch/x86: Remove <arch/cbfs.h>
There are no symmetrical headerfiles for other arch/ and after ROMCC_BOOTBLOCK and walkcbfs() removal this file ended up empty.
Change-Id: Ice3047630ced1f1471775411b93be6383f53e8bb Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- D src/arch/x86/include/arch/cbfs.h M src/drivers/intel/fsp1_1/romstage.c M src/northbridge/intel/haswell/raminit.c M src/northbridge/intel/nehalem/raminit.c M src/northbridge/intel/sandybridge/raminit_mrc.c M src/soc/intel/broadwell/romstage/raminit.c M src/soc/intel/broadwell/romstage/romstage.c M src/southbridge/intel/bd82x6x/early_pch.c 8 files changed, 0 insertions(+), 29 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/37886/1
diff --git a/src/arch/x86/include/arch/cbfs.h b/src/arch/x86/include/arch/cbfs.h deleted file mode 100644 index 1e5c59b..0000000 --- a/src/arch/x86/include/arch/cbfs.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __INCLUDE_ARCH_CBFS__ -#define __INCLUDE_ARCH_CBFS__ - -#include <commonlib/cbfs_serialized.h> -#include <endian.h> - -#define CBFS_SUBHEADER(_p) ((void *)((((uint8_t *)(_p)) + ntohl((_p)->offset)))) - -#endif diff --git a/src/drivers/intel/fsp1_1/romstage.c b/src/drivers/intel/fsp1_1/romstage.c index 95148f7..7773df7 100644 --- a/src/drivers/intel/fsp1_1/romstage.c +++ b/src/drivers/intel/fsp1_1/romstage.c @@ -13,7 +13,6 @@
#include <stddef.h> #include <arch/acpi.h> -#include <arch/cbfs.h> #include <assert.h> #include <console/console.h> #include <cbmem.h> diff --git a/src/northbridge/intel/haswell/raminit.c b/src/northbridge/intel/haswell/raminit.c index 2fdbe07..8267833 100644 --- a/src/northbridge/intel/haswell/raminit.c +++ b/src/northbridge/intel/haswell/raminit.c @@ -17,7 +17,6 @@ #include <console/usb.h> #include <string.h> #include <cbmem.h> -#include <arch/cbfs.h> #include <cbfs.h> #include <cf9_reset.h> #include <ip_checksum.h> diff --git a/src/northbridge/intel/nehalem/raminit.c b/src/northbridge/intel/nehalem/raminit.c index 8a2837e..215e9b8 100644 --- a/src/northbridge/intel/nehalem/raminit.c +++ b/src/northbridge/intel/nehalem/raminit.c @@ -23,7 +23,6 @@ #include <cpu/x86/msr.h> #include <cbmem.h> #include <cf9_reset.h> -#include <arch/cbfs.h> #include <ip_checksum.h> #include <pc80/mc146818rtc.h> #include <device/pci_def.h> diff --git a/src/northbridge/intel/sandybridge/raminit_mrc.c b/src/northbridge/intel/sandybridge/raminit_mrc.c index 29c766a..84100e7 100644 --- a/src/northbridge/intel/sandybridge/raminit_mrc.c +++ b/src/northbridge/intel/sandybridge/raminit_mrc.c @@ -22,7 +22,6 @@ #include <device/pci_ops.h> #include <arch/cpu.h> #include <cbmem.h> -#include <arch/cbfs.h> #include <cbfs.h> #include <ip_checksum.h> #include <pc80/mc146818rtc.h> diff --git a/src/soc/intel/broadwell/romstage/raminit.c b/src/soc/intel/broadwell/romstage/raminit.c index 03b564f..3759c1f 100644 --- a/src/soc/intel/broadwell/romstage/raminit.c +++ b/src/soc/intel/broadwell/romstage/raminit.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */
-#include <arch/cbfs.h> #include <assert.h> #include <cbfs.h> #include <cbmem.h> diff --git a/src/soc/intel/broadwell/romstage/romstage.c b/src/soc/intel/broadwell/romstage/romstage.c index 6294b8a..4a53c7a 100644 --- a/src/soc/intel/broadwell/romstage/romstage.c +++ b/src/soc/intel/broadwell/romstage/romstage.c @@ -15,7 +15,6 @@
#include <stddef.h> #include <stdint.h> -#include <arch/cbfs.h> #include <arch/romstage.h> #include <bootmode.h> #include <cbmem.h> diff --git a/src/southbridge/intel/bd82x6x/early_pch.c b/src/southbridge/intel/bd82x6x/early_pch.c index b12ad38..b19216b 100644 --- a/src/southbridge/intel/bd82x6x/early_pch.c +++ b/src/southbridge/intel/bd82x6x/early_pch.c @@ -15,7 +15,6 @@
#include <device/mmio.h> #include <device/pci_ops.h> -#include <arch/cbfs.h> #include <cf9_reset.h> #include <ip_checksum.h> #include <device/pci_def.h>
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37886 )
Change subject: arch/x86: Remove <arch/cbfs.h> ......................................................................
Patch Set 1: Code-Review+1
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37886 )
Change subject: arch/x86: Remove <arch/cbfs.h> ......................................................................
Patch Set 1: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/37886 )
Change subject: arch/x86: Remove <arch/cbfs.h> ......................................................................
arch/x86: Remove <arch/cbfs.h>
There are no symmetrical headerfiles for other arch/ and after ROMCC_BOOTBLOCK and walkcbfs() removal this file ended up empty.
Change-Id: Ice3047630ced1f1471775411b93be6383f53e8bb Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/37886 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: HAOUAS Elyes ehaouas@noos.fr --- D src/arch/x86/include/arch/cbfs.h M src/drivers/intel/fsp1_1/romstage.c M src/northbridge/intel/haswell/raminit.c M src/northbridge/intel/nehalem/raminit.c M src/northbridge/intel/sandybridge/raminit_mrc.c M src/soc/intel/broadwell/romstage/raminit.c M src/soc/intel/broadwell/romstage/romstage.c M src/southbridge/intel/bd82x6x/early_pch.c 8 files changed, 0 insertions(+), 29 deletions(-)
Approvals: build bot (Jenkins): Verified HAOUAS Elyes: Looks good to me, approved
diff --git a/src/arch/x86/include/arch/cbfs.h b/src/arch/x86/include/arch/cbfs.h deleted file mode 100644 index 1e5c59b..0000000 --- a/src/arch/x86/include/arch/cbfs.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __INCLUDE_ARCH_CBFS__ -#define __INCLUDE_ARCH_CBFS__ - -#include <commonlib/cbfs_serialized.h> -#include <endian.h> - -#define CBFS_SUBHEADER(_p) ((void *)((((uint8_t *)(_p)) + ntohl((_p)->offset)))) - -#endif diff --git a/src/drivers/intel/fsp1_1/romstage.c b/src/drivers/intel/fsp1_1/romstage.c index 95148f7..7773df7 100644 --- a/src/drivers/intel/fsp1_1/romstage.c +++ b/src/drivers/intel/fsp1_1/romstage.c @@ -13,7 +13,6 @@
#include <stddef.h> #include <arch/acpi.h> -#include <arch/cbfs.h> #include <assert.h> #include <console/console.h> #include <cbmem.h> diff --git a/src/northbridge/intel/haswell/raminit.c b/src/northbridge/intel/haswell/raminit.c index 2fdbe07..8267833 100644 --- a/src/northbridge/intel/haswell/raminit.c +++ b/src/northbridge/intel/haswell/raminit.c @@ -17,7 +17,6 @@ #include <console/usb.h> #include <string.h> #include <cbmem.h> -#include <arch/cbfs.h> #include <cbfs.h> #include <cf9_reset.h> #include <ip_checksum.h> diff --git a/src/northbridge/intel/nehalem/raminit.c b/src/northbridge/intel/nehalem/raminit.c index 8a2837e..215e9b8 100644 --- a/src/northbridge/intel/nehalem/raminit.c +++ b/src/northbridge/intel/nehalem/raminit.c @@ -23,7 +23,6 @@ #include <cpu/x86/msr.h> #include <cbmem.h> #include <cf9_reset.h> -#include <arch/cbfs.h> #include <ip_checksum.h> #include <pc80/mc146818rtc.h> #include <device/pci_def.h> diff --git a/src/northbridge/intel/sandybridge/raminit_mrc.c b/src/northbridge/intel/sandybridge/raminit_mrc.c index 29c766a..84100e7 100644 --- a/src/northbridge/intel/sandybridge/raminit_mrc.c +++ b/src/northbridge/intel/sandybridge/raminit_mrc.c @@ -22,7 +22,6 @@ #include <device/pci_ops.h> #include <arch/cpu.h> #include <cbmem.h> -#include <arch/cbfs.h> #include <cbfs.h> #include <ip_checksum.h> #include <pc80/mc146818rtc.h> diff --git a/src/soc/intel/broadwell/romstage/raminit.c b/src/soc/intel/broadwell/romstage/raminit.c index 03b564f..3759c1f 100644 --- a/src/soc/intel/broadwell/romstage/raminit.c +++ b/src/soc/intel/broadwell/romstage/raminit.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */
-#include <arch/cbfs.h> #include <assert.h> #include <cbfs.h> #include <cbmem.h> diff --git a/src/soc/intel/broadwell/romstage/romstage.c b/src/soc/intel/broadwell/romstage/romstage.c index 6294b8a..4a53c7a 100644 --- a/src/soc/intel/broadwell/romstage/romstage.c +++ b/src/soc/intel/broadwell/romstage/romstage.c @@ -15,7 +15,6 @@
#include <stddef.h> #include <stdint.h> -#include <arch/cbfs.h> #include <arch/romstage.h> #include <bootmode.h> #include <cbmem.h> diff --git a/src/southbridge/intel/bd82x6x/early_pch.c b/src/southbridge/intel/bd82x6x/early_pch.c index b12ad38..b19216b 100644 --- a/src/southbridge/intel/bd82x6x/early_pch.c +++ b/src/southbridge/intel/bd82x6x/early_pch.c @@ -15,7 +15,6 @@
#include <device/mmio.h> #include <device/pci_ops.h> -#include <arch/cbfs.h> #include <cf9_reset.h> #include <ip_checksum.h> #include <device/pci_def.h>