Change in coreboot[master]: arch/arm/include/armv7/arch: Correct keyword organization in...

[Logan Carlson (Code Review)]

Logan Carlson has uploaded a new change for review. ( https://review.coreboot.org/19991 )

Change subject: arch/arm/include/armv7/arch: Correct keyword organization in cpu.h
......................................................................

arch/arm/include/armv7/arch: Correct keyword organization in cpu.h

Move the inline keyword in between the static keyword and the return
type.

Change-Id: Ibacc5ee9fabff7fec2abd5534312cf3ab1bb28cf
Signed-off-by: Logan Carlson 
---
M src/arch/arm/include/armv7/arch/cpu.h
1 file changed, 7 insertions(+), 7 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/19991/1

diff --git a/src/arch/arm/include/armv7/arch/cpu.h b/src/arch/arm/include/armv7/arch/cpu.h
index d70622f..b87e3c8 100644
--- a/src/arch/arm/include/armv7/arch/cpu.h
+++ b/src/arch/arm/include/armv7/arch/cpu.h
@@ -49,7 +49,7 @@
 /* Primitives for CPU and MP cores. */

/* read Main Id register (MIDR) */
-inline static uint32_t read_midr(void)
+static inline uint32_t read_midr(void)
 {
    uint32_t value;
    asm volatile ("mrc p15, 0, %0, c0, c0, 0" : "=r"(value));
@@ -57,7 +57,7 @@
 }

/* read Multiprocessor Affinity Register (MPIDR) */
-inline static uint32_t read_mpidr(void)
+static inline uint32_t read_mpidr(void)
 {
    uint32_t value;
    asm volatile ("mrc p15, 0, %0, c0, c0, 5" : "=r"(value));
@@ -65,7 +65,7 @@
 }

/* read Auxiliary Control Register (ACTLR) */
-inline static uint32_t read_actlr(void)
+static inline uint32_t read_actlr(void)
 {
    uint32_t val = 0;
    asm volatile ("mrc p15, 0, %0, c1, c0, 1" : "=r"(val));
@@ -73,25 +73,25 @@
 }

/* write Auxiliary Control Register (ACTLR) */
-inline static void write_actlr(uint32_t val)
+static inline void write_actlr(uint32_t val)
 {
    asm volatile ("mcr p15, 0, %0, c1, c0, 1" : : "r" (val));
 }

/* wait for interrupt. */
-inline static void wfi(void)
+static inline void wfi(void)
 {
    asm volatile ("wfi" : : : "memory");
 }

/* wait for event. */
-inline static void wfe(void)
+static inline void wfe(void)
 {
    asm volatile ("wfe");
 }

/* set event (to bring up cores in WFE state). */
-inline static void sev(void)
+static inline void sev(void)
 {
    asm volatile ("sev");
 }