Change in coreboot[master]: soc/amd/common/block/include/gpio_defs: add GPIO IRQ status registers

[Felix Held (Code Review)]

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/59590 )

Change subject: soc/amd/common/block/include/gpio_defs: add GPIO IRQ status registers
......................................................................

soc/amd/common/block/include/gpio_defs: add GPIO IRQ status registers

Signed-off-by: Felix Held 
Change-Id: I585691038690f1d6855ab09f1ca5791a18cfdbfe
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59590
Tested-by: build bot (Jenkins) 
Reviewed-by: Marshall Dawson 
---
M src/soc/amd/common/block/include/amdblocks/gpio_defs.h
1 file changed, 2 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Marshall Dawson: Looks good to me, approved

diff --git a/src/soc/amd/common/block/include/amdblocks/gpio_defs.h b/src/soc/amd/common/block/include/amdblocks/gpio_defs.h
index db90211..757e0f2 100644
--- a/src/soc/amd/common/block/include/amdblocks/gpio_defs.h
+++ b/src/soc/amd/common/block/include/amdblocks/gpio_defs.h
@@ -10,6 +10,8 @@

#define GPIO_WAKE_STAT_0	0x2f0
 #define GPIO_WAKE_STAT_1	0x2f4
+#define GPIO_IRQ_STAT_0		0x2f8
+#define GPIO_IRQ_STAT_1		0x2fc

#define GPIO_PIN_IN		(1 << 0)	/* for byte access */
 #define GPIO_PIN_OUT		(1 << 6)	/* for byte access */