Change in coreboot[master]: util/superiotool/fintek.c: Correct F71808A PME registers

[Angel Pons (Code Review)]

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/49978 )

Change subject: util/superiotool/fintek.c: Correct F71808A PME registers
......................................................................

util/superiotool/fintek.c: Correct F71808A PME registers

PME register 0xfd does not exist in F71808A datasheet V0.18P, and
registers 0xfc and 0xfe were missing.

Change-Id: Idaf1577733fdf79f30eb0ae4b9547958d179d089
Signed-off-by: Angel Pons 
---
M util/superiotool/fintek.c
1 file changed, 2 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/49978/1

diff --git a/util/superiotool/fintek.c b/util/superiotool/fintek.c
index 2dcb131..12c1574 100644
--- a/util/superiotool/fintek.c
+++ b/util/superiotool/fintek.c
@@ -95,10 +95,10 @@
    	{0xa, "PME, ACPI, and EUP Power Saving",
    		{0x30,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8,
    		 0xe9,0xec,0xed,0xee,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,
-			 0xf6,0xf7,0xf8,0xf9,0xfa,0xfd,EOT},
+			 0xf6,0xf7,0xf8,0xf9,0xfa,0xfc,0xfe,EOT},
    		{0x00,0x10,0xcc,0x0c,0x13,0x09,0xc7,0x09,0x63,0x00,
    		 0x0f,0x00,0x00,0x00,0x00,NANA,0x00,NANA,0x06,0x3c,
-			 0x1f,0x00,0x00,0x00,0x00,NANA,EOT}},
+			 0x1f,0x00,0x00,0x00,0x00,0x07,0x00,EOT}},
    	{EOT}}},
    {0x0710, "F71869A/AD", {
    	/* We assume reserved bits are read as 0. */