Change in coreboot[master]: soc/intel/xeon_sp/cpx: Fix bootblock size with CBnT

[Angel Pons (Code Review)]

Attention is currently required from: Patrick Rudolph, Jonathan Zhang, Johnny Lin, Arthur Heymans.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50082 )

Change subject: soc/intel/xeon_sp/cpx: Fix bootblock size with CBnT
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Patch Set 1:

(1 comment)

File src/soc/intel/xeon_sp/cpx/Kconfig:

https://review.coreboot.org/c/coreboot/+/50082/comment/7beda299_3ba72033 
PS1, Line 9: 	select FIXED_BOOTBLOCK_SIZE if INTEL_CBNT_SUPPORT
> I would rather to have INTEL_CBNT_SUPPORT to be explicitly selected instead of implicit. […]

The fixed bootblock option would look like this:

config C_ENV_BOOTBLOCK_SIZE
    hex
    default 0xc000 if INTEL_CBNT_SUPPORT
    help
      This matches the IBB size used for CBnT. Adjust this to the
      used CBnT settings.