Change in coreboot[master]: soc/intel/tigerlake: Correct number of gpio group for Jasper Lake
Maulik V Vaghela has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39604 )
Change subject: soc/intel/tigerlake: Correct number of gpio group for Jasper Lake ......................................................................
soc/intel/tigerlake: Correct number of gpio group for Jasper Lake
Correct number of gpio pad group for Jasper Lake soc.
BUG=None BRANCH=None Test=Code compilation for Jasper Lake RVP
Change-Id: I381d0e48430e933569a3b22b66b4e6077383e9e2 Signed-off-by: Maulik V Vaghela maulik.v.vaghela@intel.com --- M src/soc/intel/tigerlake/include/soc/gpio_soc_defs_jsl.h 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/39604/1
diff --git a/src/soc/intel/tigerlake/include/soc/gpio_soc_defs_jsl.h b/src/soc/intel/tigerlake/include/soc/gpio_soc_defs_jsl.h index ce7d0d8..ded4228 100644 --- a/src/soc/intel/tigerlake/include/soc/gpio_soc_defs_jsl.h +++ b/src/soc/intel/tigerlake/include/soc/gpio_soc_defs_jsl.h @@ -35,7 +35,7 @@ #define GPP_GPD 0xA #define GPP_E 0xD
-#define GPIO_NUM_GROUPS 11 +#define GPIO_NUM_GROUPS 12 #define GPIO_MAX_NUM_PER_GROUP 24
/*
Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39604 )
Change subject: soc/intel/tigerlake: Correct number of gpio group for Jasper Lake ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39604/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/39604/1//COMMIT_MSG@9 PS1, Line 9: soc SoC
Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39604 )
Change subject: soc/intel/tigerlake: Correct number of gpio group for Jasper Lake ......................................................................
Patch Set 1: Code-Review+2
Hello build bot (Jenkins), Aamir Bohra, Ronak Kanabar, Kirtika Ruchandani, Patrick Rudolph, Karthik Ramasubramanian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39604
to look at the new patch set (#2).
Change subject: soc/intel/tigerlake: Correct number of gpio group for Jasper Lake ......................................................................
soc/intel/tigerlake: Correct number of gpio group for Jasper Lake
Correct number of gpio pad group for Jasper Lake SoC.
BUG=None BRANCH=None Test=Code compilation for Jasper Lake RVP
Change-Id: I381d0e48430e933569a3b22b66b4e6077383e9e2 Signed-off-by: Maulik V Vaghela maulik.v.vaghela@intel.com --- M src/soc/intel/tigerlake/include/soc/gpio_soc_defs_jsl.h 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/39604/2
Maulik V Vaghela has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39604 )
Change subject: soc/intel/tigerlake: Correct number of gpio group for Jasper Lake ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39604/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/39604/1//COMMIT_MSG@9 PS1, Line 9: soc
SoC
Done
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/39604 )
Change subject: soc/intel/tigerlake: Correct number of gpio group for Jasper Lake ......................................................................
soc/intel/tigerlake: Correct number of gpio group for Jasper Lake
Correct number of gpio pad group for Jasper Lake SoC.
BUG=None BRANCH=None Test=Code compilation for Jasper Lake RVP
Change-Id: I381d0e48430e933569a3b22b66b4e6077383e9e2 Signed-off-by: Maulik V Vaghela maulik.v.vaghela@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/39604 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Aamir Bohra aamir.bohra@intel.com --- M src/soc/intel/tigerlake/include/soc/gpio_soc_defs_jsl.h 1 file changed, 1 insertion(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Aamir Bohra: Looks good to me, approved
diff --git a/src/soc/intel/tigerlake/include/soc/gpio_soc_defs_jsl.h b/src/soc/intel/tigerlake/include/soc/gpio_soc_defs_jsl.h index 6cfb187..2ee52b2 100644 --- a/src/soc/intel/tigerlake/include/soc/gpio_soc_defs_jsl.h +++ b/src/soc/intel/tigerlake/include/soc/gpio_soc_defs_jsl.h @@ -34,7 +34,7 @@ #define GPP_GPD 0xA #define GPP_E 0xD
-#define GPIO_NUM_GROUPS 11 +#define GPIO_NUM_GROUPS 12 #define GPIO_MAX_NUM_PER_GROUP 24
/*
9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39604 )
Change subject: soc/intel/tigerlake: Correct number of gpio group for Jasper Lake ......................................................................
Patch Set 3:
Automatic boot test returned (PASS/FAIL/TOTAL): 3/0/3 Emulation targets: EMULATION_QEMU_X86_Q35 using payload TianoCore : SUCCESS : https://lava.9esec.io/r/1418 EMULATION_QEMU_X86_Q35 using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/1417 EMULATION_QEMU_X86_I440FX using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/1416
Please note: This test is under development and might not be accurate at all!
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9elements QA (Code Review) -
Aamir Bohra (Code Review)
-
Maulik V Vaghela (Code Review)
-
Patrick Georgi (Code Review)