Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30057
Change subject: nb/via/vx900: Select relocatable ramstage ......................................................................
nb/via/vx900: Select relocatable ramstage
There could be some performance loss due to not setting up MTRR's to cache cbmem. This resolved in a follow-up patch implementing postcar stage.
Change-Id: I53412ebc1a4169487e1234b0bf025714b5e8318f Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/northbridge/via/vx900/Kconfig 1 file changed, 0 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/30057/1
diff --git a/src/northbridge/via/vx900/Kconfig b/src/northbridge/via/vx900/Kconfig index 8d95942..98f57e4 100644 --- a/src/northbridge/via/vx900/Kconfig +++ b/src/northbridge/via/vx900/Kconfig @@ -21,7 +21,6 @@ select HAVE_DEBUG_RAM_SETUP select HAVE_DEBUG_SMBUS select HAVE_CF9_RESET - select NO_RELOCATABLE_RAMSTAGE
if NORTHBRIDGE_VIA_VX900