Change in ...coreboot[master]: sb/intel/common/spi.c: Add a pointer to the ich7 SPI registers
Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33506
Change subject: sb/intel/common/spi.c: Add a pointer to the ich7 SPI registers ......................................................................
sb/intel/common/spi.c: Add a pointer to the ich7 SPI registers
Change-Id: I7509dc2124ee7057af075c7d0607ec615b930fa3 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/southbridge/intel/common/spi.c 1 file changed, 5 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/33506/1
diff --git a/src/southbridge/intel/common/spi.c b/src/southbridge/intel/common/spi.c index 5a4b26f..f447515 100644 --- a/src/southbridge/intel/common/spi.c +++ b/src/southbridge/intel/common/spi.c @@ -92,7 +92,10 @@ uint32_t flcomp; uint32_t hsfs;
- struct ich9_spi_regs *ich9_spi; + union { + struct ich9_spi_regs *ich9_spi; + struct ich7_spi_regs *ich7_spi; + }; uint8_t *opmenu; int menubytes; uint16_t *preop; @@ -283,6 +286,7 @@ rcrb = (uint8_t *)(rcba & 0xffffc000); if (CONFIG(SOUTHBRIDGE_INTEL_I82801GX)) { ich7_spi = (struct ich7_spi_regs *)(rcrb + 0x3020); + cntlr->ich7_spi = ich7_spi; cntlr->opmenu = ich7_spi->opmenu; cntlr->menubytes = sizeof(ich7_spi->opmenu); cntlr->optype = &ich7_spi->optype;
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33506 )
Change subject: sb/intel/common/spi.c: Add a pointer to the ich7 SPI registers ......................................................................
Patch Set 1: Code-Review+2
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33506 )
Change subject: sb/intel/common/spi.c: Add a pointer to the ich7 SPI registers ......................................................................
Patch Set 1: Code-Review+1
Arthur Heymans has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/33506 )
Change subject: sb/intel/common/spi.c: Add a pointer to the ich7 SPI registers ......................................................................
sb/intel/common/spi.c: Add a pointer to the ich7 SPI registers
Change-Id: I7509dc2124ee7057af075c7d0607ec615b930fa3 Signed-off-by: Arthur Heymans arthur@aheymans.xyz Reviewed-on: https://review.coreboot.org/c/coreboot/+/33506 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Nico Huber nico.h@gmx.de Reviewed-by: Angel Pons th3fanbus@gmail.com --- M src/southbridge/intel/common/spi.c 1 file changed, 5 insertions(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved Angel Pons: Looks good to me, but someone else must approve
diff --git a/src/southbridge/intel/common/spi.c b/src/southbridge/intel/common/spi.c index 5a4b26f..f447515 100644 --- a/src/southbridge/intel/common/spi.c +++ b/src/southbridge/intel/common/spi.c @@ -92,7 +92,10 @@ uint32_t flcomp; uint32_t hsfs;
- struct ich9_spi_regs *ich9_spi; + union { + struct ich9_spi_regs *ich9_spi; + struct ich7_spi_regs *ich7_spi; + }; uint8_t *opmenu; int menubytes; uint16_t *preop; @@ -283,6 +286,7 @@ rcrb = (uint8_t *)(rcba & 0xffffc000); if (CONFIG(SOUTHBRIDGE_INTEL_I82801GX)) { ich7_spi = (struct ich7_spi_regs *)(rcrb + 0x3020); + cntlr->ich7_spi = ich7_spi; cntlr->opmenu = ich7_spi->opmenu; cntlr->menubytes = sizeof(ich7_spi->opmenu); cntlr->optype = &ich7_spi->optype;
-
Angel Pons (Code Review) -
Arthur Heymans (Code Review)
-
Nico Huber (Code Review)