[XL] Change in coreboot[main]: soc/intel/xeon-sp: Hook up public FSP bin and headers

[Nico Huber (Code Review)]

Attention is currently required from: Arthur Heymans, Chen, Gang C, Christian Walter, David Hendricks, Fabian Meyer, Felix Singer, Jincheng Li, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Shuo Liu, Srinidhi N Kaushik, Tim Chu.

Nico Huber has posted comments on this change by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/80360?usp=email )

Change subject: soc/intel/xeon-sp: Hook up public FSP bin and headers
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Patch Set 4:

(1 comment)

Patchset:

PS4:
> FSP-S is loaded by the bootloader, thus FSP-S must never access the SPI flash, modify it, protect it or whatsoever. There's no TOCTOU Vulnerability, thus nothing to protect.

It's a bit more complicated. The concern is about pointers left by FSP-M or the
code around it (e.g. in HOBs). Though, enabling paging in FSP-S is rather late
anyway. I guess they use it as a development tool, e.g. like an assertion that
tells you where you have troublesome code. Not sure why they would ever put that
into a production binary, though. And of course it's not reasonable to break FSP
ssumptions for it. It explains why the code exists, it just doesn't fit into the
FSP world, I guess.