Change in coreboot[master]: mb/emulation/qemu-riscv: Add opensbi support

[Martin Roth (Code Review)]

Martin Roth has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/34143 )

Change subject: mb/emulation/qemu-riscv: Add opensbi support
......................................................................

mb/emulation/qemu-riscv: Add opensbi support

Tested on qemu-riscv:
Boots into Linux until initrd should be loaded.

Change-Id: I4aa307c91d37703ad16643e7f8eb7925dede71a8
Signed-off-by: Patrick Rudolph 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34143
Tested-by: build bot (Jenkins) 
Reviewed-by: Philipp Deppenwiese 
---
M src/mainboard/emulation/qemu-riscv/Kconfig
M src/mainboard/emulation/qemu-riscv/memlayout.ld
2 files changed, 26 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Philipp Deppenwiese: Looks good to me, approved

diff --git a/src/mainboard/emulation/qemu-riscv/Kconfig b/src/mainboard/emulation/qemu-riscv/Kconfig
index f0f658d..fa6dccc 100644
--- a/src/mainboard/emulation/qemu-riscv/Kconfig
+++ b/src/mainboard/emulation/qemu-riscv/Kconfig
@@ -40,6 +40,7 @@
    select BOOT_DEVICE_NOT_SPI_FLASH
    select MISSING_BOARD_RESET
    select DRIVERS_UART_8250MEM
+	select RISCV_HAS_OPENSBI

config MAINBOARD_DIR
    string
@@ -57,4 +58,26 @@
    int
    default 32768

+config OPENSBI_PLATFORM
+	string
+	default "qemu/virt"
+
+# ugly, but CBFS is placed in DRAM...
+config OPENSBI_TEXT_START
+	hex
+	default 0x80010000 if COREBOOT_ROMSIZE_KB_64
+	default 0x80020000 if COREBOOT_ROMSIZE_KB_128
+	default 0x80040000 if COREBOOT_ROMSIZE_KB_256
+	default 0x80080000 if COREBOOT_ROMSIZE_KB_512
+	default 0x80100000 if COREBOOT_ROMSIZE_KB_1024
+	default 0x80200000 if COREBOOT_ROMSIZE_KB_2048
+	default 0x80400000 if COREBOOT_ROMSIZE_KB_4096
+	default 0x80600000 if COREBOOT_ROMSIZE_KB_6144
+	default 0x80800000 if COREBOOT_ROMSIZE_KB_8192
+	default 0x80a00000 if COREBOOT_ROMSIZE_KB_10240
+	default 0x80c00000 if COREBOOT_ROMSIZE_KB_12288
+	default 0x81000000 if COREBOOT_ROMSIZE_KB_16384
+	default 0x82000000 if COREBOOT_ROMSIZE_KB_32768
+	default 0x84000000 if COREBOOT_ROMSIZE_KB_65536
+
 endif #  BOARD_EMULATION_QEMU_RISCV
diff --git a/src/mainboard/emulation/qemu-riscv/memlayout.ld b/src/mainboard/emulation/qemu-riscv/memlayout.ld
index 2166d23..b29bc14 100644
--- a/src/mainboard/emulation/qemu-riscv/memlayout.ld
+++ b/src/mainboard/emulation/qemu-riscv/memlayout.ld
@@ -33,6 +33,9 @@
 #if ENV_ROMSTAGE
    ROMSTAGE(STAGES_START, 128K)
 #endif
+#if ENV_RAMSTAGE
+	REGION(opensbi, STAGES_START, 128K, 4K)
+#endif
    PRERAM_CBMEM_CONSOLE(STAGES_START + 128K, 8K)
    RAMSTAGE(STAGES_START + 200K, 16M)
    STACK(STAGES_START + 200K + 16M, 4K)