Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33416 )
Change subject: Documentation: Add Intel TXT ......................................................................
Patch Set 2:
(11 comments)
https://review.coreboot.org/c/coreboot/+/33416/2/Documentation/security/inde... File Documentation/security/index.md:
https://review.coreboot.org/c/coreboot/+/33416/2/Documentation/security/inde... PS2, Line 14: - [Intel TXT Initial BootBlock](intel/txt_ibb.md)
Boot Block with space? […]
Done
https://review.coreboot.org/c/coreboot/+/33416/2/Documentation/security/inte... File Documentation/security/intel/acm.md:
https://review.coreboot.org/c/coreboot/+/33416/2/Documentation/security/inte... PS2, Line 10: * The BIOS ACM must be referenced by the [FIT] : 2. SINIT ACM : * The SINIT ACM isn't referenced by the [FIT]
Please add a dot/period at the end of sentences.
Done
https://review.coreboot.org/c/coreboot/+/33416/2/Documentation/security/inte... PS2, Line 14: from filesystem
*the* filesystem
Done
https://review.coreboot.org/c/coreboot/+/33416/2/Documentation/security/inte... File Documentation/security/intel/txt.md:
https://review.coreboot.org/c/coreboot/+/33416/2/Documentation/security/inte... PS2, Line 16: 3. Intel TXT requires **CPU and Chipset** support.
Is there a generation since when?
Done
https://review.coreboot.org/c/coreboot/+/33416/2/Documentation/security/inte... PS2, Line 33: Individual files in the CBFS can be marked as IBB.
Add blank line below?
Done
https://review.coreboot.org/c/coreboot/+/33416/2/Documentation/security/inte... PS2, Line 38: needs
need
Done
https://review.coreboot.org/c/coreboot/+/33416/2/Documentation/security/inte... PS2, Line 63: sucessful
successful
Done
https://review.coreboot.org/c/coreboot/+/33416/2/Documentation/security/inte... PS2, Line 78: needs
need
Done
https://review.coreboot.org/c/coreboot/+/33416/2/Documentation/security/inte... File Documentation/security/intel/txt_ibb.md:
https://review.coreboot.org/c/coreboot/+/33416/2/Documentation/security/inte... PS2, Line 5: Constrains
Constraints
Done
https://review.coreboot.org/c/coreboot/+/33416/2/Documentation/security/inte... PS2, Line 8: * One IBB must contain the reset vector as well as the [FIT table] : * The IBB should be as small as possible : * The IBBs must not overlap each other : * The IBB might overlap with microcode : * The IBB must not overlap the BIOS ACM
Please add dots/periods at the end of sentences.
Done
https://review.coreboot.org/c/coreboot/+/33416/2/Documentation/security/inte... PS2, Line 15: * The IBB must be able to train the main system memory and clear all secrets : * If the IBB cannot train the main system memory it must verify the code : that can train the main system memory and is able to clear all secrets
Ditto.
Done
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Patrick Rudolph (Code Review)