Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/50877 )
Change subject: mb/google: Move ECFW_RW setting for non-ChromeEC boards ......................................................................
mb/google: Move ECFW_RW setting for non-ChromeEC boards
The boolean is stored in ChromeOS NVS, not GNVS.
Change-Id: I5c424a052d484228a456f8f0ad4fb0bed3165e09 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/include/acpi/acpi_gnvs.h M src/mainboard/google/butterfly/acpi_tables.c M src/mainboard/google/butterfly/mainboard.c M src/mainboard/google/parrot/acpi_tables.c M src/mainboard/google/parrot/chromeos.c M src/mainboard/google/parrot/ec.h M src/mainboard/google/stout/acpi_tables.c M src/mainboard/google/stout/chromeos.c M src/mainboard/samsung/lumpy/acpi_tables.c M src/mainboard/samsung/lumpy/chromeos.c M src/vendorcode/google/chromeos/chromeos.h M src/vendorcode/google/chromeos/gnvs.c 12 files changed, 19 insertions(+), 28 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/50877/1
diff --git a/src/include/acpi/acpi_gnvs.h b/src/include/acpi/acpi_gnvs.h index f24f5ef..976726a 100644 --- a/src/include/acpi/acpi_gnvs.h +++ b/src/include/acpi/acpi_gnvs.h @@ -17,8 +17,6 @@ static inline int acpi_reset_gnvs_for_wake(struct global_nvs **gnvs) { return -1; } #endif
-void gnvs_set_ecfw_rw(void); - /* * These functions populate the gnvs structure in acpi table. * Defined as weak in common acpi as gnvs structure definition is diff --git a/src/mainboard/google/butterfly/acpi_tables.c b/src/mainboard/google/butterfly/acpi_tables.c index c3324aa..aa02f67 100644 --- a/src/mainboard/google/butterfly/acpi_tables.c +++ b/src/mainboard/google/butterfly/acpi_tables.c @@ -14,13 +14,6 @@ gnvs->s5u0 = 0; gnvs->s5u1 = 0;
- // TODO: MLR - // The firmware read/write status is a "virtual" switch and - // will be handled elsewhere. Until then hard-code to - // read/write instead of read-only for developer mode. - if (CONFIG(CHROMEOS_NVS)) - gnvs_set_ecfw_rw(); - // the lid is open by default. gnvs->lids = 1;
diff --git a/src/mainboard/google/butterfly/mainboard.c b/src/mainboard/google/butterfly/mainboard.c index d9cf1b9..f278730 100644 --- a/src/mainboard/google/butterfly/mainboard.c +++ b/src/mainboard/google/butterfly/mainboard.c @@ -189,6 +189,13 @@ } }
+ // TODO: MLR + // The firmware read/write status is a "virtual" switch and + // will be handled elsewhere. Until then hard-code to + // read/write instead of read-only for developer mode. + if (CONFIG(CHROMEOS_NVS)) + chromeos_set_ecfw_rw(); + /* Initialize the Embedded Controller */ butterfly_ec_init();
diff --git a/src/mainboard/google/parrot/acpi_tables.c b/src/mainboard/google/parrot/acpi_tables.c index 535edb8..d575e88 100644 --- a/src/mainboard/google/parrot/acpi_tables.c +++ b/src/mainboard/google/parrot/acpi_tables.c @@ -3,8 +3,6 @@ #include <acpi/acpi.h> #include <acpi/acpi_gnvs.h> #include <device/device.h> -#include <ec/compal/ene932/ec.h> -#include "ec.h"
#include <southbridge/intel/bd82x6x/pch.h> #include <soc/nvs.h> @@ -21,9 +19,6 @@ gnvs->s5u0 = 0; gnvs->s5u1 = 0;
- if (CONFIG(CHROMEOS_NVS) && !parrot_ec_running_ro()) - gnvs_set_ecfw_rw(); - /* EC handles all active thermal and fan control on Parrot. */ gnvs->tcrt = CRITICAL_TEMPERATURE; gnvs->tpsv = PASSIVE_TEMPERATURE; diff --git a/src/mainboard/google/parrot/chromeos.c b/src/mainboard/google/parrot/chromeos.c index 93ed067..03b0d47 100644 --- a/src/mainboard/google/parrot/chromeos.c +++ b/src/mainboard/google/parrot/chromeos.c @@ -51,7 +51,7 @@ return gpio; }
-int parrot_ec_running_ro(void) +static int parrot_ec_running_ro(void) { return !get_gpio(68); } @@ -63,5 +63,8 @@
void mainboard_chromeos_acpi_generate(void) { + if (CONFIG(CHROMEOS_NVS) && !parrot_ec_running_ro()) + chromeos_set_ecfw_rw(); + chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios)); } diff --git a/src/mainboard/google/parrot/ec.h b/src/mainboard/google/parrot/ec.h index 98c81b6..ff9d558 100644 --- a/src/mainboard/google/parrot/ec.h +++ b/src/mainboard/google/parrot/ec.h @@ -43,7 +43,6 @@ #ifndef __ACPI__ extern void parrot_ec_init(void); u8 parrot_rev(void); -int parrot_ec_running_ro(void); #endif
#endif // PARROT_EC_H diff --git a/src/mainboard/google/stout/acpi_tables.c b/src/mainboard/google/stout/acpi_tables.c index 19549af..07e6319 100644 --- a/src/mainboard/google/stout/acpi_tables.c +++ b/src/mainboard/google/stout/acpi_tables.c @@ -2,10 +2,6 @@
#include <acpi/acpi.h> #include <acpi/acpi_gnvs.h> -#include <device/device.h> -#include <bootmode.h> -#include <ec/quanta/it8518/ec.h> -#include "ec.h" #include "onboard.h"
#include <southbridge/intel/bd82x6x/pch.h> @@ -22,9 +18,6 @@ gnvs->s5u0 = 0; gnvs->s5u1 = 0;
- if (CONFIG(CHROMEOS_NVS) && !get_recovery_mode_switch()) - gnvs_set_ecfw_rw(); - /* EC handles all thermal and fan control on Stout. */ gnvs->tcrt = CRITICAL_TEMPERATURE; gnvs->tpsv = PASSIVE_TEMPERATURE; diff --git a/src/mainboard/google/stout/chromeos.c b/src/mainboard/google/stout/chromeos.c index dfab358..07fdee3 100644 --- a/src/mainboard/google/stout/chromeos.c +++ b/src/mainboard/google/stout/chromeos.c @@ -81,5 +81,8 @@
void mainboard_chromeos_acpi_generate(void) { + if (CONFIG(CHROMEOS_NVS) && !get_recovery_mode_switch()) + chromeos_set_ecfw_rw(); + chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios)); } diff --git a/src/mainboard/samsung/lumpy/acpi_tables.c b/src/mainboard/samsung/lumpy/acpi_tables.c index 282ba34..620ed06 100644 --- a/src/mainboard/samsung/lumpy/acpi_tables.c +++ b/src/mainboard/samsung/lumpy/acpi_tables.c @@ -3,7 +3,6 @@ #include <acpi/acpi.h> #include <acpi/acpi_gnvs.h> #include <device/device.h> -#include <ec/acpi/ec.h> #include <soc/nvs.h>
#include "thermal.h" @@ -43,7 +42,4 @@ gnvs->tpsv = PASSIVE_TEMPERATURE; gnvs->tmax = MAX_TEMPERATURE; gnvs->flvl = 5; - - if (CONFIG(CHROMEOS_NVS) && ec_read(0xcb)) - gnvs_set_ecfw_rw(); } diff --git a/src/mainboard/samsung/lumpy/chromeos.c b/src/mainboard/samsung/lumpy/chromeos.c index cd4f924..aa96153 100644 --- a/src/mainboard/samsung/lumpy/chromeos.c +++ b/src/mainboard/samsung/lumpy/chromeos.c @@ -75,5 +75,8 @@
void mainboard_chromeos_acpi_generate(void) { + if (CONFIG(CHROMEOS_NVS) && ec_read(0xcb)) + chromeos_set_ecfw_rw(); + chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios)); } diff --git a/src/vendorcode/google/chromeos/chromeos.h b/src/vendorcode/google/chromeos/chromeos.h index 2b7be90..04805f2 100644 --- a/src/vendorcode/google/chromeos/chromeos.h +++ b/src/vendorcode/google/chromeos/chromeos.h @@ -30,6 +30,7 @@ void cbmem_add_vpd_calibration_data(void); void chromeos_set_me_hash(u32*, int); void chromeos_set_ramoops(void *ram_oops, size_t size); +void chromeos_set_ecfw_rw(void);
/** * get_dsm_calibration_from_key - Gets value related to DSM calibration from VPD diff --git a/src/vendorcode/google/chromeos/gnvs.c b/src/vendorcode/google/chromeos/gnvs.c index 6e0e9f8..9395f45 100644 --- a/src/vendorcode/google/chromeos/gnvs.c +++ b/src/vendorcode/google/chromeos/gnvs.c @@ -76,7 +76,7 @@ chromeos_acpi->ramoops_len = size; }
-void gnvs_set_ecfw_rw(void) +void chromeos_set_ecfw_rw(void) { if (!chromeos_acpi) return;
-
Kyösti Mälkki (Code Review)