Attention is currently required from: Tim Wawrzynczak, Sridhar Siricilla, Michael Niewöhner, Patrick Rudolph. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59359 )
Change subject: soc/intel/common: Implements ACPI CPPCv3 package to support hybrid core ......................................................................
Patch Set 1:
(12 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59359/comment/980a4ae1_5ecc9c74 PS1, Line 7: Implements Implement
https://review.coreboot.org/c/coreboot/+/59359/comment/fea2db51_a5ee26f7 PS1, Line 11: update updates
https://review.coreboot.org/c/coreboot/+/59359/comment/22699d51_35223721 PS1, Line 18: generate generates
https://review.coreboot.org/c/coreboot/+/59359/comment/e9999726_b03246e6 PS1, Line 20: update updates
https://review.coreboot.org/c/coreboot/+/59359/comment/3b087219_5b2fe875 PS1, Line 24: Cpu CPU
https://review.coreboot.org/c/coreboot/+/59359/comment/10eb8ba7_52e41ea8 PS1, Line 25: Nominal frequency or performance
https://review.coreboot.org/c/coreboot/+/59359/comment/2183ed62_bb5e5fe0 PS1, Line 25: cpu CPU
https://review.coreboot.org/c/coreboot/+/59359/comment/4c0a8d42_1ac7a620 PS1, Line 27: It also updates GNVS structure. It also adds the new members to the GNVS structure, as those are consumed(?) ….
https://review.coreboot.org/c/coreboot/+/59359/comment/e387c4c5_e18dc63c PS1, Line 29: TEST=Verified on Brya How?
https://review.coreboot.org/c/coreboot/+/59359/comment/37736b27_2dbe2d9f PS1, Line 34: methods to generate ACPI code. ????
https://review.coreboot.org/c/coreboot/+/59359/comment/fd94b906_4716480a PS1, Line 36: Change-Id: Icd5ea9e70bebd1e66d3cea2bcf8a6678e5cc95ca One Change-Id should be enough.
File src/soc/intel/common/block/acpi/acpi.c:
https://review.coreboot.org/c/coreboot/+/59359/comment/2ca5fdb2_10a2a7cb PS1, Line 376: int unsigned int? But the signature of `cpu_init_cppc_config()` seems to use `uint32_t`.