Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37870 )
Change subject: soc/intel/tigerlake: Add code for early tcss ......................................................................
Patch Set 10:
(3 comments)
https://review.coreboot.org/c/coreboot/+/37870/10//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/37870/10//COMMIT_MSG@10 PS10, Line 10: PMC IPC driver is needed to communicate with EC in order to : get status of the Type C ports
Kernel is re-scanning the ports once it is loaded. […]
The example I mentioned is actually pre-kernel. It is still firmware.
W.r.t. EC flag - is that captured in some bug?
https://review.coreboot.org/c/coreboot/+/37870/10/src/soc/intel/tigerlake/ea... File src/soc/intel/tigerlake/early_tcss.c:
https://review.coreboot.org/c/coreboot/+/37870/10/src/soc/intel/tigerlake/ea... PS10, Line 81: google_chromeec_usb_get_pd_ports
Potentially doesn't need to be tied to Chrome EC, however with Intel EC all control of TCSS is handl […]
Humm.. I understand that this is something which is very Chrome OS/Chrome EC specific. I think its okay if you want to continue with google_chromeec* calls for now. In the future, if there are more uses identified, we can potentially convert it to an abstraction layer.
https://review.coreboot.org/c/coreboot/+/37870/10/src/soc/intel/tigerlake/ea... PS10, Line 116: BS_PAYLOAD_LOAD
This was done with the assumption that external display was not supported for bios. […]
Yes, early display would be required especially on form factors which depend primarily on external display.
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Furquan Shaikh (Code Review)