[M] Change in coreboot[main]: device/pciexp_device.c: Fix setting Max Payload Size

[Michał Żygowski (Code Review)]

Attention is currently required from: Angel Pons, Arthur Heymans, Felix Held, Krystian Hebel, Nico Huber, Patrick Rudolph.

Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/77338?usp=email )

Change subject: device/pciexp_device.c: Fix setting Max Payload Size
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Patch Set 10:

(1 comment)

File src/device/pciexp_device.c:

https://review.coreboot.org/c/coreboot/+/77338/comment/6f241b6d_76dd5a36 :
PS10, Line 709: pciexp_configure_max_payload
> > Should work. […]

I have used the pciexp_set_max_payload_size without modification made in this patch, so it doesn't matter.

The problem is why dev and dev->bus->dev is the same device? Because of that the loop does not walk up the chain as it should... Looks like something is overwriting these pointers to the parent bridges?