[XS] Change in coreboot[main]: mb/qemu-riscv: set PCI_IOBASE

[Carlos López (Code Review)]

Attention is currently required from: Maximilian Brune, Philipp Hug, ron minnich.

Carlos López has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85670?usp=email )

Change subject: mb/qemu-riscv: set PCI_IOBASE
......................................................................

mb/qemu-riscv: set PCI_IOBASE

The correct value for the IO base is at 0x3000000, so set it. Otherwise,
I/O operations (e.g. inb(), outb(), etc.) won't work.

Change-Id: Ied7d7e815348afa68a92c3dda30be64163231615
Signed-off-by: Carlos López 
---
M src/mainboard/emulation/qemu-riscv/Kconfig
1 file changed, 4 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/85670/1

diff --git a/src/mainboard/emulation/qemu-riscv/Kconfig b/src/mainboard/emulation/qemu-riscv/Kconfig
index 9b5a6f0..2361e25 100644
--- a/src/mainboard/emulation/qemu-riscv/Kconfig
+++ b/src/mainboard/emulation/qemu-riscv/Kconfig
@@ -77,4 +77,8 @@
    hex
    default 0x80020000

+config PCI_IOBASE
+	hex
+	default 0x3000000
+
 endif #  BOARD_EMULATION_QEMU_RISCV