Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46136 )
Change subject: mb/google/beltino: Disable PCIe AER ......................................................................
mb/google/beltino: Disable PCIe AER
Ethernet hardware on beltino variants doesn't support AER, so disable it to mitigate continuous AER timeout errors in dmesg.
Change-Id: I0f592a21d08e79cda251e80cd1f1184c4311e9df Signed-off-by: Matt DeVillier matt.devillier@gmail.com --- M src/mainboard/google/beltino/Kconfig 1 file changed, 3 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/46136/1
diff --git a/src/mainboard/google/beltino/Kconfig b/src/mainboard/google/beltino/Kconfig index 0ac6805..cbf9dc4 100644 --- a/src/mainboard/google/beltino/Kconfig +++ b/src/mainboard/google/beltino/Kconfig @@ -59,4 +59,7 @@ config ENABLE_DDR_2X_REFRESH default y
+config PCIEXP_AER + def_bool n + endif # BOARD_GOOGLE_BASEBOARD_BELTINO
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46136 )
Change subject: mb/google/beltino: Disable PCIe AER ......................................................................
Patch Set 1: Code-Review+1
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46136 )
Change subject: mb/google/beltino: Disable PCIe AER ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/46136/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/46136/1//COMMIT_MSG@10 PS1, Line 10: disable it to mitigate continuous AER timeout errors in dmesg. Please paste one error line, so search engines and people can easily search for that error message.
Hello build bot (Jenkins), Angel Pons,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46136
to look at the new patch set (#2).
Change subject: mb/google/beltino: Disable PCIe AER ......................................................................
mb/google/beltino: Disable PCIe AER
Ethernet hardware on beltino variants doesn't support AER, so disable it to mitigate continuous AER timeout errors in dmesg:
pcieport 0000:00:1c.0: AER: Corrected error received: 0000:00:1c.0 pcieport 0000:00:1c.0: AER: PCIe Bus Error: severity=Corrected, type=Data Link Layer, (Transmitter ID) pcieport 0000:00:1c.0: AER: device [8086:9c94] error status/mask=00001000/00002000 pcieport 0000:00:1c.0: AER: [12] Timeout
Change-Id: I0f592a21d08e79cda251e80cd1f1184c4311e9df Signed-off-by: Matt DeVillier matt.devillier@gmail.com --- M src/mainboard/google/beltino/Kconfig 1 file changed, 3 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/46136/2
Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46136 )
Change subject: mb/google/beltino: Disable PCIe AER ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/46136/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/46136/1//COMMIT_MSG@10 PS1, Line 10: disable it to mitigate continuous AER timeout errors in dmesg.
Please paste one error line, so search engines and people can easily search for that error message.
Done
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46136 )
Change subject: mb/google/beltino: Disable PCIe AER ......................................................................
Patch Set 2: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46136 )
Change subject: mb/google/beltino: Disable PCIe AER ......................................................................
mb/google/beltino: Disable PCIe AER
Ethernet hardware on beltino variants doesn't support AER, so disable it to mitigate continuous AER timeout errors in dmesg:
pcieport 0000:00:1c.0: AER: Corrected error received: 0000:00:1c.0 pcieport 0000:00:1c.0: AER: PCIe Bus Error: severity=Corrected, type=Data Link Layer, (Transmitter ID) pcieport 0000:00:1c.0: AER: device [8086:9c94] error status/mask=00001000/00002000 pcieport 0000:00:1c.0: AER: [12] Timeout
Change-Id: I0f592a21d08e79cda251e80cd1f1184c4311e9df Signed-off-by: Matt DeVillier matt.devillier@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/46136 Reviewed-by: Angel Pons th3fanbus@gmail.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/google/beltino/Kconfig 1 file changed, 3 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/src/mainboard/google/beltino/Kconfig b/src/mainboard/google/beltino/Kconfig index 0ac6805..cbf9dc4 100644 --- a/src/mainboard/google/beltino/Kconfig +++ b/src/mainboard/google/beltino/Kconfig @@ -59,4 +59,7 @@ config ENABLE_DDR_2X_REFRESH default y
+config PCIEXP_AER + def_bool n + endif # BOARD_GOOGLE_BASEBOARD_BELTINO
-
Angel Pons (Code Review) -
Matt DeVillier (Code Review)
-
Patrick Georgi (Code Review)
-
Paul Menzel (Code Review)