Change in coreboot[master]: cpu/amd/*/model_*_init: use mca_get_bank_count()

[Felix Held (Code Review)]

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56184 )

Change subject: cpu/amd/*/model_*_init: use mca_get_bank_count()
......................................................................

cpu/amd/*/model_*_init: use mca_get_bank_count()

Use the common mca_get_bank_count function instead of open-coding the
functionality to get the MCA bank number. Also re-type the num_banks
variable from signed in to unsigned int, since the number of MCA bank is
always positive.

Change-Id: I70ad423aab484cf4ec8f51b43624cd434647aad4
Signed-off-by: Felix Held 
---
M src/cpu/amd/agesa/family14/model_14_init.c
M src/cpu/amd/agesa/family15tn/model_15_init.c
M src/cpu/amd/agesa/family16kb/model_16_init.c
M src/cpu/amd/pi/00730F01/model_16_init.c
4 files changed, 8 insertions(+), 12 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/56184/1

diff --git a/src/cpu/amd/agesa/family14/model_14_init.c b/src/cpu/amd/agesa/family14/model_14_init.c
index 942539c..1bcbc34 100644
--- a/src/cpu/amd/agesa/family14/model_14_init.c
+++ b/src/cpu/amd/agesa/family14/model_14_init.c
@@ -17,7 +17,7 @@
 {
    u8 i;
    msr_t msr;
-	int num_banks;
+	unsigned int num_banks;
    int msrno;
 #if CONFIG(LOGICAL_CPUS)
    u32 siblings;
@@ -59,8 +59,7 @@
    x86_enable_cache();

/* zero the machine check error status registers */
-	msr = rdmsr(IA32_MCG_CAP);
-	num_banks = msr.lo & MCA_BANKS_MASK;
+	num_banks = mca_get_bank_count();
    msr.lo = 0;
    msr.hi = 0;
    for (i = 0; i < num_banks; i++)
diff --git a/src/cpu/amd/agesa/family15tn/model_15_init.c b/src/cpu/amd/agesa/family15tn/model_15_init.c
index 83efb44..c7fcb36 100644
--- a/src/cpu/amd/agesa/family15tn/model_15_init.c
+++ b/src/cpu/amd/agesa/family15tn/model_15_init.c
@@ -20,7 +20,7 @@

u8 i;
    msr_t msr;
-	int num_banks;
+	unsigned int num_banks;
    int msrno;
    unsigned int cpu_idx;
 #if CONFIG(LOGICAL_CPUS)
@@ -58,8 +58,7 @@
    x86_enable_cache();

/* zero the machine check error status registers */
-	msr = rdmsr(IA32_MCG_CAP);
-	num_banks = msr.lo & MCA_BANKS_MASK;
+	num_banks = mca_get_bank_count();
    msr.lo = 0;
    msr.hi = 0;
    for (i = 0; i < num_banks; i++)
diff --git a/src/cpu/amd/agesa/family16kb/model_16_init.c b/src/cpu/amd/agesa/family16kb/model_16_init.c
index c1c7577..28c3e78 100644
--- a/src/cpu/amd/agesa/family16kb/model_16_init.c
+++ b/src/cpu/amd/agesa/family16kb/model_16_init.c
@@ -19,7 +19,7 @@

u8 i;
    msr_t msr;
-	int num_banks;
+	unsigned int num_banks;
    int msrno;
 #if CONFIG(LOGICAL_CPUS)
    u32 siblings;
@@ -56,8 +56,7 @@
    x86_enable_cache();

/* zero the machine check error status registers */
-	msr = rdmsr(IA32_MCG_CAP);
-	num_banks = msr.lo & MCA_BANKS_MASK;
+	num_banks = mca_get_bank_count();
    msr.lo = 0;
    msr.hi = 0;
    for (i = 0; i < num_banks; i++)
diff --git a/src/cpu/amd/pi/00730F01/model_16_init.c b/src/cpu/amd/pi/00730F01/model_16_init.c
index 358f83b..7266a2c 100644
--- a/src/cpu/amd/pi/00730F01/model_16_init.c
+++ b/src/cpu/amd/pi/00730F01/model_16_init.c
@@ -22,7 +22,7 @@

u8 i;
    msr_t msr;
-	int num_banks;
+	unsigned int num_banks;
    u32 siblings;

/*
@@ -41,8 +41,7 @@
    x86_mtrr_check();

/* zero the machine check error status registers */
-	msr = rdmsr(IA32_MCG_CAP);
-	num_banks = msr.lo & MCA_BANKS_MASK;
+	num_banks = mca_get_bank_count();
    msr.lo = 0;
    msr.hi = 0;
    for (i = 0; i < num_banks; i++)