[M] Change in coreboot[master]: soc/intel/alderlake: Add IBECC

[Subrata Banik (Code Review)]

Attention is currently required from: Tarun Tuli, Paul Menzel, Christian Walter, Tim Wawrzynczak, Maximilian Brune, David Milosevic.

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68756 )

Change subject: soc/intel/alderlake: Add IBECC
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Patch Set 7:

(2 comments)

File src/soc/intel/alderlake/romstage/fsp_params.c:

https://review.coreboot.org/c/coreboot/+/68756/comment/d6d5958f_1376c86f 
PS7, Line 382: 		printk(BIOS_DEBUG, "Enable IBECC\n");
I don't think this is meaningful

https://review.coreboot.org/c/coreboot/+/68756/comment/a6e095c0_8c3f4694 
PS7, Line 369: 
             : 	/* In-Band ECC configuration */
             : 	if (config->ibecc.enable) {
             : 		m_cfg->Ibecc = config->ibecc.enable;
             : 		m_cfg->IbeccOperationMode = config->ibecc.mode;
             : 		if (m_cfg->IbeccOperationMode == IBECC_MODE_PER_REGION) {
             : 			FSP_ARRAY_LOAD(m_cfg->IbeccProtectedRangeEnable,
             : 				       config->ibecc.range_enable);
             : 			FSP_ARRAY_LOAD(m_cfg->IbeccProtectedRangeBase,
             : 				       config->ibecc.range_base);
             : 			FSP_ARRAY_LOAD(m_cfg->IbeccProtectedRangeMask,
             : 				       config->ibecc.range_mask);
             : 		}
             : 		printk(BIOS_DEBUG, "Enable IBECC\n");
             : 	}
please help to create a small helper routine and call into it from line #364