Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34940 )
Change subject: src/ec: Drop __PRE_RAM__ and __SMM__ guards ......................................................................
src/ec: Drop __PRE_RAM__ and __SMM__ guards
For files built in ramstage and smm -classes, testing for !__PRE_RAM__ is redundant.
All chip_operations are exluded with use of DEVTREE_EARLY in static devicetree, so garbage collection will take care of the !__SMM__ cases.
Change-Id: Id7219848d6f5c41c4a9724a72204fa5ef9458e43 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/ec/acpi/ec.c M src/ec/compal/ene932/ec.c M src/ec/google/chromeec/ec.c M src/ec/google/chromeec/ec_i2c.c M src/ec/google/chromeec/ec_spi.c M src/ec/quanta/ene_kb3940q/ec.c M src/ec/quanta/it8518/ec.c 7 files changed, 3 insertions(+), 38 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/34940/1
diff --git a/src/ec/acpi/ec.c b/src/ec/acpi/ec.c index 61cad65..dd91fab 100644 --- a/src/ec/acpi/ec.c +++ b/src/ec/acpi/ec.c @@ -20,17 +20,8 @@ #include <delay.h> #include "ec.h"
-#ifdef __PRE_RAM__ - -static const int ec_cmd_reg = EC_SC; -static const int ec_data_reg = EC_DATA; - -#else - -static int ec_cmd_reg = EC_SC; -static int ec_data_reg = EC_DATA; - -#endif +static DEVTREE_CONST int ec_cmd_reg = EC_SC; +static DEVTREE_CONST int ec_data_reg = EC_DATA;
int send_ec_command(u8 command) { @@ -162,18 +153,14 @@ ec_write(addr, ec_read(addr) & ~(1 << bit)); }
-#ifndef __PRE_RAM__ - +#if !DEVTREE_EARLY void ec_set_ports(u16 cmd_reg, u16 data_reg) { ec_cmd_reg = cmd_reg; ec_data_reg = data_reg; } - #endif
-#if !defined(__SMM__) && !defined(__PRE_RAM__) struct chip_operations ec_acpi_ops = { CHIP_NAME("ACPI Embedded Controller") }; -#endif diff --git a/src/ec/compal/ene932/ec.c b/src/ec/compal/ene932/ec.c index cfabd8d..5bade10 100644 --- a/src/ec/compal/ene932/ec.c +++ b/src/ec/compal/ene932/ec.c @@ -14,8 +14,6 @@ * GNU General Public License for more details. */
-#ifndef __PRE_RAM__ - #include <console/console.h> #include <device/device.h> #include <device/pnp.h> @@ -125,7 +123,6 @@ } */
-#ifndef __SMM__ static void ene932_init(struct device *dev) { if (!dev->enabled) @@ -155,5 +152,3 @@ CHIP_NAME("COMPAL ENE932 EC") .enable_dev = enable_dev }; -#endif /* ! __SMM__ */ -#endif /* ! __PRE_RAM__ */ diff --git a/src/ec/google/chromeec/ec.c b/src/ec/google/chromeec/ec.c index 5a2630e..ed53c61 100644 --- a/src/ec/google/chromeec/ec.c +++ b/src/ec/google/chromeec/ec.c @@ -719,8 +719,6 @@ return cec_cmd.cmd_code; }
-#ifndef __PRE_RAM__ - int google_chromeec_i2c_xfer(uint8_t chip, uint8_t addr, int alen, uint8_t *buffer, int len, int is_read) { @@ -1109,8 +1107,6 @@ return (ec_image_type == EC_IMAGE_RO); }
-#endif /* ! __PRE_RAM__ */ - /** * Check if EC/TCPM is in an alternate mode or not. * diff --git a/src/ec/google/chromeec/ec_i2c.c b/src/ec/google/chromeec/ec_i2c.c index c3e1968..dc012fc 100644 --- a/src/ec/google/chromeec/ec_i2c.c +++ b/src/ec/google/chromeec/ec_i2c.c @@ -252,10 +252,8 @@
#endif /* CONFIG_EC_GOOGLE_CHROMEEC_I2C_PROTO3 */
-#ifndef __PRE_RAM__ u8 google_chromeec_get_event(void) { printk(BIOS_ERR, "%s: Not supported.\n", __func__); return 0; } -#endif diff --git a/src/ec/google/chromeec/ec_spi.c b/src/ec/google/chromeec/ec_spi.c index 3611814..c47d419 100644 --- a/src/ec/google/chromeec/ec_spi.c +++ b/src/ec/google/chromeec/ec_spi.c @@ -115,10 +115,8 @@ return crosec_command_proto(cec_command, crosec_spi_io, &slave); }
-#ifndef __PRE_RAM__ u8 google_chromeec_get_event(void) { printk(BIOS_ERR, "%s: Not supported.\n", __func__); return 0; } -#endif diff --git a/src/ec/quanta/ene_kb3940q/ec.c b/src/ec/quanta/ene_kb3940q/ec.c index 1f8e36c..4fc38da 100644 --- a/src/ec/quanta/ene_kb3940q/ec.c +++ b/src/ec/quanta/ene_kb3940q/ec.c @@ -14,8 +14,6 @@ * GNU General Public License for more details. */
-#ifndef __PRE_RAM__ - #include <arch/io.h> #include <console/console.h> #include <device/device.h> @@ -125,7 +123,6 @@ return; }
-#ifndef __SMM__ static void ene_kb3940q_log_events(void) { #if CONFIG(ELOG) @@ -165,5 +162,3 @@ CHIP_NAME("QUANTA EnE KB3940Q EC") .enable_dev = enable_dev }; -#endif /* ! __SMM__ */ -#endif /* ! __PRE_RAM__ */ diff --git a/src/ec/quanta/it8518/ec.c b/src/ec/quanta/it8518/ec.c index 5b9ba9f..4853eb3 100644 --- a/src/ec/quanta/it8518/ec.c +++ b/src/ec/quanta/it8518/ec.c @@ -124,7 +124,6 @@ ec_write_ib(data); }
-#ifndef __PRE_RAM__
u8 ec_it8518_get_event(void) { @@ -149,7 +148,6 @@ ec_write(EC_WAKE_SRC_ENABLE, reg8 | EC_LID_WAKE_ENABLE); }
-#ifndef __SMM__ static void it8518_init(struct device *dev) { if (!dev->enabled) @@ -178,5 +176,3 @@ CHIP_NAME("QUANTA IT8518 EC") .enable_dev = enable_dev }; -#endif /* ! __SMM__ */ -#endif /* ! __PRE_RAM__ */
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/34940
to look at the new patch set (#2).
Change subject: src/ec: Drop __PRE_RAM__ and __SMM__ guards ......................................................................
src/ec: Drop __PRE_RAM__ and __SMM__ guards
For files built in ramstage and smm -classes, testing for !__PRE_RAM__ is redundant.
All chip_operations are exluded with use of DEVTREE_EARLY in static devicetree, so garbage collection will take care of the !__SMM__ cases.
Change-Id: Id7219848d6f5c41c4a9724a72204fa5ef9458e43 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/ec/acpi/ec.c M src/ec/compal/ene932/ec.c M src/ec/google/chromeec/ec.c M src/ec/google/chromeec/ec_i2c.c M src/ec/google/chromeec/ec_spi.c M src/ec/quanta/ene_kb3940q/ec.c M src/ec/quanta/it8518/ec.c 7 files changed, 2 insertions(+), 28 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/34940/2
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/34940
to look at the new patch set (#4).
Change subject: src/ec: Drop __PRE_RAM__ and __SMM__ guards ......................................................................
src/ec: Drop __PRE_RAM__ and __SMM__ guards
For files built in ramstage and smm -classes, testing for !__PRE_RAM__ is redundant.
All chip_operations are exluded with use of DEVTREE_EARLY in static devicetree, so garbage collection will take care of the !__SMM__ cases.
Change-Id: Id7219848d6f5c41c4a9724a72204fa5ef9458e43 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/ec/acpi/ec.c M src/ec/compal/ene932/ec.c M src/ec/google/chromeec/ec.c M src/ec/google/chromeec/ec_i2c.c M src/ec/google/chromeec/ec_lpc.c M src/ec/google/chromeec/ec_spi.c M src/ec/quanta/ene_kb3940q/ec.c M src/ec/quanta/it8518/ec.c M src/ec/smsc/mec1308/ec.c 9 files changed, 3 insertions(+), 36 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/34940/4
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/34940
to look at the new patch set (#6).
Change subject: src/ec: Drop __PRE_RAM__ and __SMM__ guards ......................................................................
src/ec: Drop __PRE_RAM__ and __SMM__ guards
For files built in ramstage and smm -classes, testing for !__PRE_RAM__ is redundant.
All chip_operations are exluded with use of DEVTREE_EARLY in static devicetree, so garbage collection will take care of the !__SMM__ cases.
Change-Id: Id7219848d6f5c41c4a9724a72204fa5ef9458e43 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/ec/acpi/ec.c M src/ec/compal/ene932/ec.c M src/ec/google/chromeec/ec.c M src/ec/google/chromeec/ec_i2c.c M src/ec/google/chromeec/ec_lpc.c M src/ec/google/chromeec/ec_spi.c M src/ec/quanta/ene_kb3940q/ec.c M src/ec/quanta/it8518/ec.c M src/ec/smsc/mec1308/ec.c 9 files changed, 1 insertion(+), 32 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/34940/6
Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34940 )
Change subject: src/ec: Drop __PRE_RAM__ and __SMM__ guards ......................................................................
Patch Set 8: Code-Review+2
Kyösti Mälkki has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/34940 )
Change subject: src/ec: Drop __PRE_RAM__ and __SMM__ guards ......................................................................
src/ec: Drop __PRE_RAM__ and __SMM__ guards
For files built in ramstage and smm -classes, testing for !__PRE_RAM__ is redundant.
All chip_operations are exluded with use of DEVTREE_EARLY in static devicetree, so garbage collection will take care of the !__SMM__ cases.
Change-Id: Id7219848d6f5c41c4a9724a72204fa5ef9458e43 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/34940 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Aaron Durbin adurbin@chromium.org --- M src/ec/acpi/ec.c M src/ec/compal/ene932/ec.c M src/ec/google/chromeec/ec.c M src/ec/google/chromeec/ec_i2c.c M src/ec/google/chromeec/ec_lpc.c M src/ec/google/chromeec/ec_spi.c M src/ec/quanta/ene_kb3940q/ec.c M src/ec/quanta/it8518/ec.c M src/ec/smsc/mec1308/ec.c 9 files changed, 1 insertion(+), 32 deletions(-)
Approvals: build bot (Jenkins): Verified Aaron Durbin: Looks good to me, approved
diff --git a/src/ec/acpi/ec.c b/src/ec/acpi/ec.c index 61cad65..481622c 100644 --- a/src/ec/acpi/ec.c +++ b/src/ec/acpi/ec.c @@ -172,8 +172,6 @@
#endif
-#if !defined(__SMM__) && !defined(__PRE_RAM__) struct chip_operations ec_acpi_ops = { CHIP_NAME("ACPI Embedded Controller") }; -#endif diff --git a/src/ec/compal/ene932/ec.c b/src/ec/compal/ene932/ec.c index cfabd8d..5bade10 100644 --- a/src/ec/compal/ene932/ec.c +++ b/src/ec/compal/ene932/ec.c @@ -14,8 +14,6 @@ * GNU General Public License for more details. */
-#ifndef __PRE_RAM__ - #include <console/console.h> #include <device/device.h> #include <device/pnp.h> @@ -125,7 +123,6 @@ } */
-#ifndef __SMM__ static void ene932_init(struct device *dev) { if (!dev->enabled) @@ -155,5 +152,3 @@ CHIP_NAME("COMPAL ENE932 EC") .enable_dev = enable_dev }; -#endif /* ! __SMM__ */ -#endif /* ! __PRE_RAM__ */ diff --git a/src/ec/google/chromeec/ec.c b/src/ec/google/chromeec/ec.c index 5a2630e..ed53c61 100644 --- a/src/ec/google/chromeec/ec.c +++ b/src/ec/google/chromeec/ec.c @@ -719,8 +719,6 @@ return cec_cmd.cmd_code; }
-#ifndef __PRE_RAM__ - int google_chromeec_i2c_xfer(uint8_t chip, uint8_t addr, int alen, uint8_t *buffer, int len, int is_read) { @@ -1109,8 +1107,6 @@ return (ec_image_type == EC_IMAGE_RO); }
-#endif /* ! __PRE_RAM__ */ - /** * Check if EC/TCPM is in an alternate mode or not. * diff --git a/src/ec/google/chromeec/ec_i2c.c b/src/ec/google/chromeec/ec_i2c.c index c3e1968..dc012fc 100644 --- a/src/ec/google/chromeec/ec_i2c.c +++ b/src/ec/google/chromeec/ec_i2c.c @@ -252,10 +252,8 @@
#endif /* CONFIG_EC_GOOGLE_CHROMEEC_I2C_PROTO3 */
-#ifndef __PRE_RAM__ u8 google_chromeec_get_event(void) { printk(BIOS_ERR, "%s: Not supported.\n", __func__); return 0; } -#endif diff --git a/src/ec/google/chromeec/ec_lpc.c b/src/ec/google/chromeec/ec_lpc.c index 7dae6a2..feea9dd 100644 --- a/src/ec/google/chromeec/ec_lpc.c +++ b/src/ec/google/chromeec/ec_lpc.c @@ -415,8 +415,6 @@ return -1; }
-#ifndef __PRE_RAM__ -#ifndef __SMM__ static void lpc_ec_init(struct device *dev) { if (!dev->enabled) @@ -471,8 +469,6 @@ .enable_dev = enable_dev, };
-#endif /* __SMM__ */ - static int google_chromeec_data_ready(u16 port) { return google_chromeec_status_check(port, EC_LPC_CMDR_DATA, @@ -502,4 +498,3 @@ /* Event (or 0 if none) is returned directly in the data byte */ return read_byte(EC_LPC_ADDR_ACPI_DATA); } -#endif diff --git a/src/ec/google/chromeec/ec_spi.c b/src/ec/google/chromeec/ec_spi.c index 3611814..c47d419 100644 --- a/src/ec/google/chromeec/ec_spi.c +++ b/src/ec/google/chromeec/ec_spi.c @@ -115,10 +115,8 @@ return crosec_command_proto(cec_command, crosec_spi_io, &slave); }
-#ifndef __PRE_RAM__ u8 google_chromeec_get_event(void) { printk(BIOS_ERR, "%s: Not supported.\n", __func__); return 0; } -#endif diff --git a/src/ec/quanta/ene_kb3940q/ec.c b/src/ec/quanta/ene_kb3940q/ec.c index 1f8e36c..4fc38da 100644 --- a/src/ec/quanta/ene_kb3940q/ec.c +++ b/src/ec/quanta/ene_kb3940q/ec.c @@ -14,8 +14,6 @@ * GNU General Public License for more details. */
-#ifndef __PRE_RAM__ - #include <arch/io.h> #include <console/console.h> #include <device/device.h> @@ -125,7 +123,6 @@ return; }
-#ifndef __SMM__ static void ene_kb3940q_log_events(void) { #if CONFIG(ELOG) @@ -165,5 +162,3 @@ CHIP_NAME("QUANTA EnE KB3940Q EC") .enable_dev = enable_dev }; -#endif /* ! __SMM__ */ -#endif /* ! __PRE_RAM__ */ diff --git a/src/ec/quanta/it8518/ec.c b/src/ec/quanta/it8518/ec.c index 5b9ba9f..4853eb3 100644 --- a/src/ec/quanta/it8518/ec.c +++ b/src/ec/quanta/it8518/ec.c @@ -124,7 +124,6 @@ ec_write_ib(data); }
-#ifndef __PRE_RAM__
u8 ec_it8518_get_event(void) { @@ -149,7 +148,6 @@ ec_write(EC_WAKE_SRC_ENABLE, reg8 | EC_LID_WAKE_ENABLE); }
-#ifndef __SMM__ static void it8518_init(struct device *dev) { if (!dev->enabled) @@ -178,5 +176,3 @@ CHIP_NAME("QUANTA IT8518 EC") .enable_dev = enable_dev }; -#endif /* ! __SMM__ */ -#endif /* ! __PRE_RAM__ */ diff --git a/src/ec/smsc/mec1308/ec.c b/src/ec/smsc/mec1308/ec.c index 83dd729..c6e282a 100644 --- a/src/ec/smsc/mec1308/ec.c +++ b/src/ec/smsc/mec1308/ec.c @@ -115,10 +115,9 @@ ec_data_reg = data_reg; }
-#if !defined(__PRE_RAM__) && !defined(__SMM__) static void mec1308_enable(struct device *dev) { - struct ec_smsc_mec1308_config *conf = dev->chip_info; + DEVTREE_CONST struct ec_smsc_mec1308_config *conf = dev->chip_info;
if (conf->mailbox_port) { ec_cmd_reg = conf->mailbox_port; @@ -130,4 +129,3 @@ CHIP_NAME("SMSC MEC1308 EC Mailbox Interface") .enable_dev = mec1308_enable }; -#endif