Krishna P Bhat D has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60896 )
Change subject: mb/intel/adlrvp_n: Configure EC in RW GPIO ......................................................................
mb/intel/adlrvp_n: Configure EC in RW GPIO
EC_IN_RW signal from EC GPIO is connected to GPIO E7 of SOC. This GPIO can be used to check EC status trusted (LOW: in RO) or untrusted (HIGH: in RW).
BRANCH=None BUG=None TEST=Issue manual recovery and confirm DUT is entering recovery mode.
Change-Id: Ib8b6be9fcda24bd2bb479b5b6c01f24a6e9c7b1f Signed-off-by: Krishna Prasad Bhat krishna.p.bhat.d@intel.com --- M src/mainboard/intel/adlrvp/chromeos.c M src/mainboard/intel/adlrvp/gpio_n.c 2 files changed, 3 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/60896/1
diff --git a/src/mainboard/intel/adlrvp/chromeos.c b/src/mainboard/intel/adlrvp/chromeos.c index fce365d..905dbec 100644 --- a/src/mainboard/intel/adlrvp/chromeos.c +++ b/src/mainboard/intel/adlrvp/chromeos.c @@ -16,7 +16,8 @@ {-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"}, {GPIO_EC_IN_RW, ACTIVE_HIGH, gpio_get(GPIO_EC_IN_RW), "EC in RW"}, }; - if (CONFIG(BOARD_INTEL_ADLRVP_P_EXT_EC) || CONFIG(BOARD_INTEL_ADLRVP_M_EXT_EC)) + if (CONFIG(BOARD_INTEL_ADLRVP_P_EXT_EC) || CONFIG(BOARD_INTEL_ADLRVP_M_EXT_EC) + || CONFIG(BOARD_INTEL_ADLRVP_N_EXT_EC)) lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios)); else lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios) - 1); @@ -50,7 +51,7 @@ chromeos_acpi_gpio_generate(gpios, num); }
-#if (CONFIG(BOARD_INTEL_ADLRVP_P_EXT_EC) || CONFIG(BOARD_INTEL_ADLRVP_M_EXT_EC)) +#if (CONFIG(BOARD_INTEL_ADLRVP_P_EXT_EC) || CONFIG(BOARD_INTEL_ADLRVP_M_EXT_EC)) || CONFIG(BOARD_INTEL_ADLRVP_N_EXT_EC) int get_ec_is_trusted(void) { /* EC is trusted if not in RW. */ diff --git a/src/mainboard/intel/adlrvp/gpio_n.c b/src/mainboard/intel/adlrvp/gpio_n.c index 8e395e5..e520550 100644 --- a/src/mainboard/intel/adlrvp/gpio_n.c +++ b/src/mainboard/intel/adlrvp/gpio_n.c @@ -26,9 +26,6 @@ /* EC_SLP_S0_CS_N */ PAD_CFG_GPO(GPP_E4, 1, PLTRST),
- /* GPPC_E7_EC_SMI_N */ - PAD_CFG_GPI_SMI(GPP_E7, NONE, PLTRST, EDGE_SINGLE, INVERT), - /* H15 : DDPB_CTRLCLK ==> DDIB_HDMI_CTRLCLK */ PAD_CFG_NF(GPP_H15, NONE, DEEP, NF1), /* H17 : DDPB_CTRLDATA ==> DDIB_HDMI_CTRLDATA */