Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36588 )
Change subject: cpu/intel/em64t101: Add Nehalem to compatibility list ......................................................................
cpu/intel/em64t101: Add Nehalem to compatibility list
Change-Id: I15a1c824b92e18f9963c60659ead92c988d1239b Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/include/cpu/intel/em64t101_save_state.h 1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/36588/1
diff --git a/src/include/cpu/intel/em64t101_save_state.h b/src/include/cpu/intel/em64t101_save_state.h index b8bb2db..7493c85 100644 --- a/src/include/cpu/intel/em64t101_save_state.h +++ b/src/include/cpu/intel/em64t101_save_state.h @@ -20,6 +20,7 @@
/* Intel Revision 30101 SMM State-Save Area * The following processor architectures use this: + * - Nehalem * - SandyBridge * - IvyBridge * - Haswell
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36588 )
Change subject: cpu/intel/em64t101: Add Nehalem to compatibility list ......................................................................
Patch Set 1: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/36588 )
Change subject: cpu/intel/em64t101: Add Nehalem to compatibility list ......................................................................
cpu/intel/em64t101: Add Nehalem to compatibility list
Change-Id: I15a1c824b92e18f9963c60659ead92c988d1239b Signed-off-by: Arthur Heymans arthur@aheymans.xyz Reviewed-on: https://review.coreboot.org/c/coreboot/+/36588 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com --- M src/include/cpu/intel/em64t101_save_state.h 1 file changed, 1 insertion(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/src/include/cpu/intel/em64t101_save_state.h b/src/include/cpu/intel/em64t101_save_state.h index b8bb2db..7493c85 100644 --- a/src/include/cpu/intel/em64t101_save_state.h +++ b/src/include/cpu/intel/em64t101_save_state.h @@ -20,6 +20,7 @@
/* Intel Revision 30101 SMM State-Save Area * The following processor architectures use this: + * - Nehalem * - SandyBridge * - IvyBridge * - Haswell
-
Angel Pons (Code Review) -
Arthur Heymans (Code Review)
-
Patrick Georgi (Code Review)