Attention is currently required from: Tim Crawford, Nico Huber, Jeremy Soller. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49104 )
Change subject: soc/intel/cannonlake: Allow setting PCIe subsystem IDs after FSP SiliconInit ......................................................................
Patch Set 7:
(3 comments)
File src/soc/intel/cannonlake/fsp_params.c:
https://review.coreboot.org/c/coreboot/+/49104/comment/09b2269d_5601d398 PS6, Line 558: = {0}
Done
Originally, this was non-static, which was wrong in its own way (see my reasoning on earlier patchsets), but required the initializer.
File src/soc/intel/cannonlake/fsp_params.c:
https://review.coreboot.org/c/coreboot/+/49104/comment/25dbf00f_68076ad6 PS7, Line 540: reserved1 You can omit the names for reserved fields. Personally, I'd also align the colons, but that's up to personal preference (coding style doesn't say anything about it)
https://review.coreboot.org/c/coreboot/+/49104/comment/1466329c_e9c794bc PS7, Line 582: params->SiNumberOfSsidTableEntry = i; Note that this approach will result in FSP programming the default SVID/SSID values when neither xHCI nor HDA are present in the devicetree. This would be an extremely unlikely scenario, though.