Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/20951 )
Change subject: soc/intel/skylake: Configure FSP to skip ME MBP step ......................................................................
Patch Set 1: Code-Review+2
(1 comment)
https://review.coreboot.org/#/c/20951/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/20951/1//COMMIT_MSG@13 PS1, Line 13: boot with FSP debug enabled binary and ensure that the : output indicates this step is being skipped: : Skipping MBP data due to SkipMbpHob set! Does this also help with the boot time?