Patrick Georgi (pgeorgi@google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13977
-gerrit
commit 599d2cc0fca42cdac2f1949568d61bdd404375de Author: Yidi Lin yidi.lin@mediatek.com Date: Mon Jan 11 10:05:46 2016 +0800
google/oak: Configure USB OC pins
BRANCH=none BUG=none TEST=none
Change-Id: If7244d0050833c676de72106d1c8473dd8f290a8 Signed-off-by: Patrick Georgi pgeorgi@chromium.org Original-Commit-Id: 89356785e66eb6d5b52fdf09933d2d28d9f67a90 Original-Change-Id: I94dda9834da6553795e7f3f65ff267fdcb6b7d47 Original-Signed-off-by: Yidi Lin yidi.lin@mediatek.com Original-Reviewed-on: https://chromium-review.googlesource.com/321055 Original-Reviewed-by: Julius Werner jwerner@chromium.org --- src/mainboard/google/oak/mainboard.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/src/mainboard/google/oak/mainboard.c b/src/mainboard/google/oak/mainboard.c index df0945b..192f4b3 100644 --- a/src/mainboard/google/oak/mainboard.c +++ b/src/mainboard/google/oak/mainboard.c @@ -135,8 +135,21 @@ static void configure_usb(void) { setup_usb_host();
- if (board_id() > 3) + if (board_id() > 3) { + /* Enable current limit */ gpio_output(PAD_CM2MCLK, 1); + /* Configure USB OC pins*/ + gpio_input_pullup(PAD_MSDC3_DSL); + gpio_input_pullup(PAD_CMPCLK); + gpio_input_pullup(PAD_PCM_SYNC); + } + + if (board_id() > 4) { + /* USB 2.0 type A port over current interrupt pin(low active) */ + gpio_input_pullup(PAD_UCTS2); + /* USB 2.0 type A port BC1.2 STATUS(low active) */ + gpio_input_pullup(PAD_AUD_DAT_MISO); + } }
static void configure_usb_hub(void)