HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36130 )
Change subject: soc/intel/broadwell: Fix 'dead increment' ......................................................................
soc/intel/broadwell: Fix 'dead increment'
Dead increment spotted out using clang-tools.
Change-Id: Icfab0b9ce97722fe97a0306cb45fbc2bd072bad6 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/soc/intel/broadwell/sata.c 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/36130/1
diff --git a/src/soc/intel/broadwell/sata.c b/src/soc/intel/broadwell/sata.c index e47a78d..9575935 100644 --- a/src/soc/intel/broadwell/sata.c +++ b/src/soc/intel/broadwell/sata.c @@ -76,7 +76,7 @@
/* Setup register 9Ch */ reg16 = 0; /* Disable alternate ID */ - reg16 = 1 << 5; /* BWG step 12 */ + reg16 |= (1 << 5); /* BWG step 12 */ pci_write_config16(dev, 0x9c, reg16);
/* SATA Initialization register */
Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36130 )
Change subject: soc/intel/broadwell: Fix 'dead increment' ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/36130/1/src/soc/intel/broadwell/sat... File src/soc/intel/broadwell/sata.c:
https://review.coreboot.org/c/coreboot/+/36130/1/src/soc/intel/broadwell/sat... PS1, Line 78: reg16 = 0; /* Disable alternate ID */ : reg16 = 1 << 5; /* BWG step 12 */ I suppose what scan-build is really complaining about is that the variable is first set to 0, then to another value before that 0 was ever used. You could just make these two lines into "reg = 1 << 5;", no?
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36130 )
Change subject: soc/intel/broadwell: Fix 'dead increment' ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/36130/1/src/soc/intel/broadwell/sat... File src/soc/intel/broadwell/sata.c:
https://review.coreboot.org/c/coreboot/+/36130/1/src/soc/intel/broadwell/sat... PS1, Line 78: reg16 = 0; /* Disable alternate ID */ : reg16 = 1 << 5; /* BWG step 12 */
I suppose what scan-build is really complaining about is that the variable is first set to 0, then t […]
The documentation I have states that the register's default value is zero. It also states that this register is 32 bit wide.
In any case, this "Disable alternate ID" line is because bits 7 and 6 allow changing the PCI ID of the SATA controller when in RAID mode.
Hello Patrick Rudolph, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36130
to look at the new patch set (#2).
Change subject: soc/intel/broadwell: Fix 'dead increment' ......................................................................
soc/intel/broadwell: Fix 'dead increment'
Dead increment spotted out using clang-tools.
Change-Id: Icfab0b9ce97722fe97a0306cb45fbc2bd072bad6 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/soc/intel/broadwell/sata.c 1 file changed, 1 insertion(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/36130/2
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36130 )
Change subject: soc/intel/broadwell: Fix 'dead increment' ......................................................................
Patch Set 2: Code-Review+2
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36130 )
Change subject: soc/intel/broadwell: Fix 'dead increment' ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/36130/1/src/soc/intel/broadwell/sat... File src/soc/intel/broadwell/sata.c:
https://review.coreboot.org/c/coreboot/+/36130/1/src/soc/intel/broadwell/sat... PS1, Line 78: reg16 = 0; /* Disable alternate ID */ : reg16 = 1 << 5; /* BWG step 12 */
The documentation I have states that the register's default value is zero. […]
Done
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/36130 )
Change subject: soc/intel/broadwell: Fix 'dead increment' ......................................................................
soc/intel/broadwell: Fix 'dead increment'
Dead increment spotted out using clang-tools.
Change-Id: Icfab0b9ce97722fe97a0306cb45fbc2bd072bad6 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr Reviewed-on: https://review.coreboot.org/c/coreboot/+/36130 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com --- M src/soc/intel/broadwell/sata.c 1 file changed, 1 insertion(+), 2 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/src/soc/intel/broadwell/sata.c b/src/soc/intel/broadwell/sata.c index e47a78d..f4773e1 100644 --- a/src/soc/intel/broadwell/sata.c +++ b/src/soc/intel/broadwell/sata.c @@ -75,8 +75,7 @@ pci_write_config32(dev, 0x98, reg32);
/* Setup register 9Ch */ - reg16 = 0; /* Disable alternate ID */ - reg16 = 1 << 5; /* BWG step 12 */ + reg16 = (1 << 5); /* BWG step 12 */ pci_write_config16(dev, 0x9c, reg16);
/* SATA Initialization register */
-
Angel Pons (Code Review) -
HAOUAS Elyes (Code Review)
-
Patrick Georgi (Code Review)