[XS] Change in coreboot[main]: mb/google/brox/var/jubilant: Set PCIe root port 5 speed to Gen2

[Ren Kuo (Code Review)]

Attention is currently required from: David Wu, Karthik Ramasubramanian, Subrata Banik.

Ren Kuo has posted comments on this change by Ren Kuo. ( https://review.coreboot.org/c/coreboot/+/85533?usp=email )

Change subject: mb/google/brox/var/jubilant: Set PCIe root port 5 speed to Gen2
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Patch Set 2:

(1 comment)

Commit Message:

https://review.coreboot.org/c/coreboot/+/85533/comment/f4bb349a_5095a35d?usp... :
PS1, Line 9: The decision to set PCIe root port 5 speed to Gen2 is based on experiment
> `Possible unwrapped commit description (prefer a maximum 72 chars per line)`

Please fix.