Attention is currently required from: Eric Lai, Jakub Czapiga, Kangheui Won, Kapil Porwal, Sukumar Ghorai, Sumeet R Pawnikar, Tarun Tuli.
Hello Jakub Czapiga, Kangheui Won, Kapil Porwal, Subrata Banik, Sumeet R Pawnikar, Tarun Tuli, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/76835?usp=email
to look at the new patch set (#4).
The following approvals got outdated and were removed: Code-Review+1 by Kangheui Won, Code-Review+2 by Kapil Porwal, Code-Review+2 by Sumeet R Pawnikar, Verified+1 by build bot (Jenkins)
Change subject: mb/google/rex: enable d3hot for storage devices ......................................................................
mb/google/rex: enable d3hot for storage devices
_DSD "StorageD3Enable" property is needs to be set under the root port in the DSDT or SSDT. The ACPI _DSD method is the preferred way to opt D3hot support for storage devices.
This also bypasses the low LTR from SSD that blocking S0i2.2 LTR/latency SoC requirement.
Name (_DSD, Package () { ToUUID("5025030F-842F-4AB4-A561-99A5189762D0"), Package () { Package (2) {"StorageD3Enable", 1}, // 1 - Enable; 0 - Disable } } )
BUG=b:289028958 TEST=Check code compiles & boot rex, and verify the "StorageD3Enable" SSDT entry.
Change-Id: I19decc2706954e73bc28fc2d9c3c4d18d2c384b7 Signed-off-by: Kangheui Won khwon@chromium.org Signed-off-by: Sukumar Ghorai sukumar.ghorai@intel.com --- M src/mainboard/google/rex/variants/rex0/overridetree.cb 1 file changed, 7 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/76835/4