Change in coreboot[master]: vc/amd/fsp/cezanne: update SMU setting section of FspmUpd.h

[Felix Held (Code Review)]

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I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/52452

to look at the new patch set (#2).

Change subject: vc/amd/fsp/cezanne: update SMU setting section of FspmUpd.h
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vc/amd/fsp/cezanne: update SMU setting section of FspmUpd.h

There was a bug in the UPDs for STAPM settings that required one UPD
field to be extended from 8 to 32 bits, so this patch is a breaking
change to the binary layout, but since the UPD struct fields for the SMU
SoC power and performance tuning parameters aren't populated by the
coreboot code yet and we added some padding after each logical section
in the UPD, this isn't expected to cause too much trouble; the only
thing that is required is that a very recent build of the FSP binaries
need to be used in combination with the new coreboot code that will
populate the struct fields in follow-up patches.

BUG=b:182297189

Signed-off-by: Felix Held 
Change-Id: If39aaf64e8e1b4c0426f22ce8ed07707c2a31e61
---
M src/vendorcode/amd/fsp/cezanne/FspmUpd.h
1 file changed, 15 insertions(+), 15 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/52452/2