Yu-Ping Wu has submitted this change. ( https://review.coreboot.org/c/coreboot/+/85948?usp=email )
Change subject: soc/mediatek: Correct value's data type to u8 in dptx ......................................................................
soc/mediatek: Correct value's data type to u8 in dptx
TEST=build pass BUG=b:343351631
Change-Id: I60bbb2c37811655692a5a8cd9f942fed4ead8abb Signed-off-by: Bincai Liu bincai.liu@mediatek.corp-partner.google.com Signed-off-by: Yidi Lin yidilin@chromium.org Reviewed-on: https://review.coreboot.org/c/coreboot/+/85948 Reviewed-by: Yidi Lin yidilin@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Yu-Ping Wu yupingso@google.com --- M src/soc/mediatek/common/dp/dptx_hal.c M src/soc/mediatek/common/dp/dptx_hal_common.c M src/soc/mediatek/common/dp/include/soc/dptx_hal_common.h 3 files changed, 8 insertions(+), 8 deletions(-)
Approvals: Yidi Lin: Looks good to me, approved build bot (Jenkins): Verified Yu-Ping Wu: Looks good to me, approved
diff --git a/src/soc/mediatek/common/dp/dptx_hal.c b/src/soc/mediatek/common/dp/dptx_hal.c index 28a1480..91fbddf 100644 --- a/src/soc/mediatek/common/dp/dptx_hal.c +++ b/src/soc/mediatek/common/dp/dptx_hal.c @@ -79,7 +79,7 @@ }
bool dptx_hal_setswing_preemphasis(struct mtk_dp *mtk_dp, int lane_num, - int swing_value, int preemphasis) + u8 swing_value, u8 preemphasis) { printk(BIOS_DEBUG, "lane(%d), set swing(%#x), emp(%#x)\n", lane_num, swing_value, preemphasis); @@ -220,7 +220,7 @@ mtk_dp_write_byte(mtk_dp, 0x1038, BIT(0), BIT(0)); }
-void dptx_hal_set_txlane(struct mtk_dp *mtk_dp, int value) +void dptx_hal_set_txlane(struct mtk_dp *mtk_dp, u8 value) { if (value == 0) mtk_dp_write_byte(mtk_dp, REG_35F0_DP_TRANS_P0, @@ -239,7 +239,7 @@ } }
-void dptx_hal_set_txrate(struct mtk_dp *mtk_dp, int value) +void dptx_hal_set_txrate(struct mtk_dp *mtk_dp, u8 value) { /* Power off TPLL and lane */ mtk_dp_write(mtk_dp, 0x2000, 0x00000001); diff --git a/src/soc/mediatek/common/dp/dptx_hal_common.c b/src/soc/mediatek/common/dp/dptx_hal_common.c index fda1b4f..43fe2f5 100644 --- a/src/soc/mediatek/common/dp/dptx_hal_common.c +++ b/src/soc/mediatek/common/dp/dptx_hal_common.c @@ -498,7 +498,7 @@ GENMASK(7, 5)); }
-void dptx_hal_set_txtrainingpattern(struct mtk_dp *mtk_dp, int value) +void dptx_hal_set_txtrainingpattern(struct mtk_dp *mtk_dp, u8 value) { /* if Set TPS1. */ if (value == BIT(4)) diff --git a/src/soc/mediatek/common/dp/include/soc/dptx_hal_common.h b/src/soc/mediatek/common/dp/include/soc/dptx_hal_common.h index 7f0e30f..9c55318 100644 --- a/src/soc/mediatek/common/dp/include/soc/dptx_hal_common.h +++ b/src/soc/mediatek/common/dp/include/soc/dptx_hal_common.h @@ -63,7 +63,7 @@ bool dptx_hal_auxwrite_bytes(struct mtk_dp *mtk_dp, u8 cmd, u32 dpcd_addr, size_t length, u8 *data); bool dptx_hal_setswing_preemphasis(struct mtk_dp *mtk_dp, int lane_num, - int swing_value, int preemphasis); + u8 swing_value, u8 preemphasis); u8 dptx_hal_get_colorbpp(struct mtk_dp *mtk_dp); u32 mtk_dp_phy_read(struct mtk_dp *mtk_dp, u32 offset); void mtk_dp_phy_mask(struct mtk_dp *mtk_dp, u32 offset, u32 val, u32 mask); @@ -81,10 +81,10 @@ void dptx_hal_phy_setting(struct mtk_dp *mtk_dp); void dptx_hal_aux_setting(struct mtk_dp *mtk_dp); void dptx_hal_digital_setting(struct mtk_dp *mtk_dp); -void dptx_hal_set_txlane(struct mtk_dp *mtk_dp, int value); +void dptx_hal_set_txlane(struct mtk_dp *mtk_dp, u8 value); void dptx_hal_phy_setidlepattern(struct mtk_dp *mtk_dp, bool enable); void dptx_hal_phyd_reset(struct mtk_dp *mtk_dp); -void dptx_hal_set_txtrainingpattern(struct mtk_dp *mtk_dp, int value); +void dptx_hal_set_txtrainingpattern(struct mtk_dp *mtk_dp, u8 value); void dptx_hal_set_ef_mode(struct mtk_dp *mtk_dp, bool enable); void dptx_hal_setscramble(struct mtk_dp *mtk_dp, bool enable); void dptx_hal_init_setting(struct mtk_dp *mtk_dp); @@ -100,7 +100,7 @@ void dptx_hal_setmisc(struct mtk_dp *mtk_dp, u8 cmisc[2]); void dptx_hal_set_color_depth(struct mtk_dp *mtk_dp, u8 color_depth); void dptx_hal_set_color_format(struct mtk_dp *mtk_dp, u8 color_format); -void dptx_hal_set_txrate(struct mtk_dp *mtk_dp, int value); +void dptx_hal_set_txrate(struct mtk_dp *mtk_dp, u8 value); void dptx_hal_analog_power_en(struct mtk_dp *mtk_dp, bool enable);
#endif /* SOC_MEDIATEK_COMMON_DP_DPTX_HAL_COMMON_H */