HAOUAS Elyes (ehaouas@noos.fr) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17206
-gerrit
commit 9996ae2fb77bd12a783fce1a7e192a000b5ce1b0 Author: Elyes HAOUAS ehaouas@noos.fr Date: Wed Nov 2 08:26:37 2016 +0100
src/mainboard/*/*/spd.h: Correct SPD_DRAM_LPDDR3 type
Regarding JEDEC Standard No. 21-C, Annex M: Serial Presence Detect (SPD) for LPDDR3 and LPDDR4 SDRAM Modules Committee Document Reference Title: LPDDR3 and LPDDR4 SPD Document Release 1 Key Byte / DRAM Device Type for LPDDR3 is 0x0f
Change-Id: Ic90a1381900b6f6a5b970a14f9490061b1303b5e Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- src/mainboard/google/auron/spd/spd.h | 2 +- src/mainboard/google/auron_paine/spd/spd.h | 2 +- src/mainboard/google/chell/spd/spd.h | 2 +- src/mainboard/google/eve/spd/spd.h | 2 +- src/mainboard/google/glados/spd/spd.h | 2 +- src/mainboard/google/lars/spd/spd.h | 2 +- src/mainboard/google/samus/spd/spd.h | 2 +- src/mainboard/intel/kblrvp/spd/spd.h | 2 +- src/mainboard/intel/kunimitsu/spd/spd.h | 2 +- 9 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/src/mainboard/google/auron/spd/spd.h b/src/mainboard/google/auron/spd/spd.h index cbb463f..44b1e45 100644 --- a/src/mainboard/google/auron/spd/spd.h +++ b/src/mainboard/google/auron/spd/spd.h @@ -20,7 +20,7 @@
#define SPD_DRAM_TYPE 2 #define SPD_DRAM_DDR3 0x0b -#define SPD_DRAM_LPDDR3 0xf1 +#define SPD_DRAM_LPDDR3 0x0f #define SPD_DENSITY_BANKS 4 #define SPD_ADDRESSING 5 #define SPD_ORGANIZATION 7 diff --git a/src/mainboard/google/auron_paine/spd/spd.h b/src/mainboard/google/auron_paine/spd/spd.h index 09a48fd..7863f7d 100644 --- a/src/mainboard/google/auron_paine/spd/spd.h +++ b/src/mainboard/google/auron_paine/spd/spd.h @@ -20,7 +20,7 @@
#define SPD_DRAM_TYPE 2 #define SPD_DRAM_DDR3 0x0b -#define SPD_DRAM_LPDDR3 0xf1 +#define SPD_DRAM_LPDDR3 0x0f #define SPD_DENSITY_BANKS 4 #define SPD_ADDRESSING 5 #define SPD_ORGANIZATION 7 diff --git a/src/mainboard/google/chell/spd/spd.h b/src/mainboard/google/chell/spd/spd.h index c8e7b33..6166064 100644 --- a/src/mainboard/google/chell/spd/spd.h +++ b/src/mainboard/google/chell/spd/spd.h @@ -21,7 +21,7 @@
#define SPD_DRAM_TYPE 2 #define SPD_DRAM_DDR3 0x0b -#define SPD_DRAM_LPDDR3 0xf1 +#define SPD_DRAM_LPDDR3 0x0f #define SPD_DENSITY_BANKS 4 #define SPD_ADDRESSING 5 #define SPD_ORGANIZATION 7 diff --git a/src/mainboard/google/eve/spd/spd.h b/src/mainboard/google/eve/spd/spd.h index 9c2b26b..182c4fd 100644 --- a/src/mainboard/google/eve/spd/spd.h +++ b/src/mainboard/google/eve/spd/spd.h @@ -21,7 +21,7 @@
#define SPD_DRAM_TYPE 2 #define SPD_DRAM_DDR3 0x0b -#define SPD_DRAM_LPDDR3 0xf1 +#define SPD_DRAM_LPDDR3 0x0f #define SPD_DENSITY_BANKS 4 #define SPD_ADDRESSING 5 #define SPD_ORGANIZATION 7 diff --git a/src/mainboard/google/glados/spd/spd.h b/src/mainboard/google/glados/spd/spd.h index c8e7b33..6166064 100644 --- a/src/mainboard/google/glados/spd/spd.h +++ b/src/mainboard/google/glados/spd/spd.h @@ -21,7 +21,7 @@
#define SPD_DRAM_TYPE 2 #define SPD_DRAM_DDR3 0x0b -#define SPD_DRAM_LPDDR3 0xf1 +#define SPD_DRAM_LPDDR3 0x0f #define SPD_DENSITY_BANKS 4 #define SPD_ADDRESSING 5 #define SPD_ORGANIZATION 7 diff --git a/src/mainboard/google/lars/spd/spd.h b/src/mainboard/google/lars/spd/spd.h index d71487b..bb73716 100644 --- a/src/mainboard/google/lars/spd/spd.h +++ b/src/mainboard/google/lars/spd/spd.h @@ -21,7 +21,7 @@
#define SPD_DRAM_TYPE 2 #define SPD_DRAM_DDR3 0x0b -#define SPD_DRAM_LPDDR3 0xf1 +#define SPD_DRAM_LPDDR3 0x0f #define SPD_DENSITY_BANKS 4 #define SPD_ADDRESSING 5 #define SPD_ORGANIZATION 7 diff --git a/src/mainboard/google/samus/spd/spd.h b/src/mainboard/google/samus/spd/spd.h index dbfd6a0..dbb0c7f 100644 --- a/src/mainboard/google/samus/spd/spd.h +++ b/src/mainboard/google/samus/spd/spd.h @@ -20,7 +20,7 @@
#define SPD_DRAM_TYPE 2 #define SPD_DRAM_DDR3 0x0b -#define SPD_DRAM_LPDDR3 0xf1 +#define SPD_DRAM_LPDDR3 0x0f #define SPD_DENSITY_BANKS 4 #define SPD_ADDRESSING 5 #define SPD_ORGANIZATION 7 diff --git a/src/mainboard/intel/kblrvp/spd/spd.h b/src/mainboard/intel/kblrvp/spd/spd.h index e04d13c..0ae23aa 100644 --- a/src/mainboard/intel/kblrvp/spd/spd.h +++ b/src/mainboard/intel/kblrvp/spd/spd.h @@ -25,7 +25,7 @@
#define SPD_DRAM_TYPE 2 #define SPD_DRAM_DDR3 0x0b -#define SPD_DRAM_LPDDR3 0xf1 +#define SPD_DRAM_LPDDR3 0x0f #define SPD_DENSITY_BANKS 4 #define SPD_ADDRESSING 5 #define SPD_ORGANIZATION 7 diff --git a/src/mainboard/intel/kunimitsu/spd/spd.h b/src/mainboard/intel/kunimitsu/spd/spd.h index f53c9ec..29d3735 100644 --- a/src/mainboard/intel/kunimitsu/spd/spd.h +++ b/src/mainboard/intel/kunimitsu/spd/spd.h @@ -25,7 +25,7 @@
#define SPD_DRAM_TYPE 2 #define SPD_DRAM_DDR3 0x0b -#define SPD_DRAM_LPDDR3 0xf1 +#define SPD_DRAM_LPDDR3 0x0f #define SPD_DENSITY_BANKS 4 #define SPD_ADDRESSING 5 #define SPD_ORGANIZATION 7
-
HAOUAS Elyes