Change in coreboot[master]: mb/prodrive/hermes: Update PCIe slots in devicetree

[Patrick Rudolph (Code Review)]

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47239 )

Change subject: mb/prodrive/hermes: Update PCIe slots in devicetree
......................................................................

mb/prodrive/hermes: Update PCIe slots in devicetree

* Drop PcieRpSlotImplemented on internal slots
* Add PCIe port 15 that connected to CNVi/M2.E

Change-Id: Iaa05affa760b447fc1725e674b12366684a63720
Signed-off-by: Patrick Rudolph 
---
M src/mainboard/prodrive/hermes/variants/baseboard/overridetree.cb
1 file changed, 9 insertions(+), 18 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/47239/1

diff --git a/src/mainboard/prodrive/hermes/variants/baseboard/overridetree.cb b/src/mainboard/prodrive/hermes/variants/baseboard/overridetree.cb
index 2c0c26a..56348c2 100644
--- a/src/mainboard/prodrive/hermes/variants/baseboard/overridetree.cb
+++ b/src/mainboard/prodrive/hermes/variants/baseboard/overridetree.cb
@@ -187,30 +187,21 @@
    		smbios_slot_desc "SlotTypePciExpressGen3X16" "SlotLengthOther" "SLOT3" "SlotDataBusWidth4X"
    		register "PcieRpSlotImplemented[0]" = "1"
    	end
-		device pci 1c.4 on	# PCIe root port 5 (PHY 3)
-			register "PcieRpSlotImplemented[4]" = "1"
-		end
-		device pci 1c.5 on	# PCIe root port 6 (PHY 4)
-			register "PcieRpSlotImplemented[5]" = "1"
-		end
-		device pci 1c.6 on	# PCIe root port 7 (PHY 2)
-			register "PcieRpSlotImplemented[6]" = "1"
-		end
-		device pci 1c.7 on	# PCIe root port 8 (PHY 1)
-			register "PcieRpSlotImplemented[7]" = "1"
-		end
+		device pci 1c.4 on end	# PCIe root port 5 (PHY 3)
+		device pci 1c.5 on end	# PCIe root port 6 (PHY 4)
+		device pci 1c.6 on end	# PCIe root port 7 (PHY 2)
+		device pci 1c.7 on end	# PCIe root port 8 (PHY 1)

device pci 1d.0 on	# PCIe root port 9 (M2 M)
    		smbios_slot_desc "SlotTypePciExpressGen3X16" "SlotLengthOther" "M2 M" "SlotDataBusWidth4X"
    		register "PcieRpSlotImplemented[8]" = "1"
    	end
-		device pci 1d.5 on	# PCIe root port 14 (PHY 0)
-			register "PcieRpSlotImplemented[13]" = "1"
+		device pci 1d.5 on end	# PCIe root port 14 (PHY 0)
+		device pci 1d.6 on end	# PCIe root port 15 (BMC)
+		device pci 1d.7 on	# PCIe root port 16 (M.2 E/CNVi)
+			# Disabled when CNVi is present
+			register "PcieRpSlotImplemented[15]" = "1"
    	end
-		device pci 1d.6 on	# PCIe root port 15 (BMC)
-			register "PcieRpSlotImplemented[14]" = "1"
-		end
-
    	device pci 1e.0 on  end # UART #0
    	device pci 1e.1 on  end # UART #1
    	device pci 1e.2 off end # GSPI #0

[Angel Pons (Code Review)]

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47239 )

Change subject: mb/prodrive/hermes: Update PCIe slots in devicetree
......................................................................

Patch Set 1: Code-Review+2

(1 comment)

https://review.coreboot.org/c/coreboot/+/47239/1//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/47239/1//COMMIT_MSG@10 
PS1, Line 10: M2.E
M.2 E?

Change in coreboot[master]: t shiomb/prodrive/hermes: Update PCIe slots in devicetree

[Patrick Rudolph (Code Review)]

Hello build bot (Jenkins), Angel Pons,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/47239

to look at the new patch set (#2).

Change subject: t shiomb/prodrive/hermes: Update PCIe slots in devicetree
......................................................................

t shiomb/prodrive/hermes: Update PCIe slots in devicetree

* Drop PcieRpSlotImplemented on internal slots
* Add PCIe port 15 that connected to CNVi/M.2 E

Change-Id: Iaa05affa760b447fc1725e674b12366684a63720
Signed-off-by: Patrick Rudolph 
---
M src/mainboard/prodrive/hermes/variants/baseboard/overridetree.cb
1 file changed, 9 insertions(+), 18 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/47239/2

Change in coreboot[master]: t shiomb/prodrive/hermes: Update PCIe slots in devicetree

[Angel Pons (Code Review)]

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47239 )

Change subject: t shiomb/prodrive/hermes: Update PCIe slots in devicetree
......................................................................

Patch Set 2: Code-Review+1

(1 comment)

https://review.coreboot.org/c/coreboot/+/47239/2//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/47239/2//COMMIT_MSG@7 
PS2, Line 7: t shio
oops

[Patrick Rudolph (Code Review)]

Hello build bot (Jenkins), Angel Pons,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/47239

to look at the new patch set (#3).

Change subject: mb/prodrive/hermes: Update PCIe slots in devicetree
......................................................................

mb/prodrive/hermes: Update PCIe slots in devicetree

* Drop PcieRpSlotImplemented on internal slots
* Add PCIe port 15 that connected to CNVi/M.2 E

Change-Id: Iaa05affa760b447fc1725e674b12366684a63720
Signed-off-by: Patrick Rudolph 
---
M src/mainboard/prodrive/hermes/variants/baseboard/overridetree.cb
1 file changed, 9 insertions(+), 18 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/47239/3

[Patrick Rudolph (Code Review)]

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47239 )

Change subject: mb/prodrive/hermes: Update PCIe slots in devicetree
......................................................................

Patch Set 4:

(1 comment)

https://review.coreboot.org/c/coreboot/+/47239/2//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/47239/2//COMMIT_MSG@7 
PS2, Line 7: t shio
> oops

Done

[Angel Pons (Code Review)]

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47239 )

Change subject: mb/prodrive/hermes: Update PCIe slots in devicetree
......................................................................

Patch Set 4: Code-Review+2

[Angel Pons (Code Review)]

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47239 )

Change subject: mb/prodrive/hermes: Update PCIe slots in devicetree
......................................................................

Patch Set 4:

(1 comment)

https://review.coreboot.org/c/coreboot/+/47239/1//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/47239/1//COMMIT_MSG@10 
PS1, Line 10: M2.E
> M. […]

Done

[Christian Walter (Code Review)]

Christian Walter has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47239 )

Change subject: mb/prodrive/hermes: Update PCIe slots in devicetree
......................................................................

Patch Set 4: Code-Review+2

[Arthur Heymans (Code Review)]

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47239 )

Change subject: mb/prodrive/hermes: Update PCIe slots in devicetree
......................................................................

Patch Set 4: Code-Review+2

[Patrick Rudolph (Code Review)]

Patrick Rudolph has submitted this change. ( https://review.coreboot.org/c/coreboot/+/47239 )

Change subject: mb/prodrive/hermes: Update PCIe slots in devicetree
......................................................................

mb/prodrive/hermes: Update PCIe slots in devicetree

* Drop PcieRpSlotImplemented on internal slots
* Add PCIe port 15 that connected to CNVi/M.2 E

Change-Id: Iaa05affa760b447fc1725e674b12366684a63720
Signed-off-by: Patrick Rudolph 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47239
Tested-by: build bot (Jenkins) 
Reviewed-by: Angel Pons 
Reviewed-by: Christian Walter 
Reviewed-by: Arthur Heymans 
---
M src/mainboard/prodrive/hermes/variants/baseboard/overridetree.cb
1 file changed, 9 insertions(+), 18 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Arthur Heymans: Looks good to me, approved
  Angel Pons: Looks good to me, approved
  Christian Walter: Looks good to me, approved

diff --git a/src/mainboard/prodrive/hermes/variants/baseboard/overridetree.cb b/src/mainboard/prodrive/hermes/variants/baseboard/overridetree.cb
index 025510e..b543a78 100644
--- a/src/mainboard/prodrive/hermes/variants/baseboard/overridetree.cb
+++ b/src/mainboard/prodrive/hermes/variants/baseboard/overridetree.cb
@@ -185,30 +185,21 @@
    		smbios_slot_desc "SlotTypePciExpressGen3X16" "SlotLengthOther" "SLOT3" "SlotDataBusWidth4X"
    		register "PcieRpSlotImplemented[0]" = "1"
    	end
-		device pci 1c.4 on	# PCIe root port 5 (PHY 3)
-			register "PcieRpSlotImplemented[4]" = "1"
-		end
-		device pci 1c.5 on	# PCIe root port 6 (PHY 4)
-			register "PcieRpSlotImplemented[5]" = "1"
-		end
-		device pci 1c.6 on	# PCIe root port 7 (PHY 2)
-			register "PcieRpSlotImplemented[6]" = "1"
-		end
-		device pci 1c.7 on	# PCIe root port 8 (PHY 1)
-			register "PcieRpSlotImplemented[7]" = "1"
-		end
+		device pci 1c.4 on end	# PCIe root port 5 (PHY 3)
+		device pci 1c.5 on end	# PCIe root port 6 (PHY 4)
+		device pci 1c.6 on end	# PCIe root port 7 (PHY 2)
+		device pci 1c.7 on end	# PCIe root port 8 (PHY 1)

device pci 1d.0 on	# PCIe root port 9 (M2 M)
    		smbios_slot_desc "SlotTypePciExpressGen3X16" "SlotLengthOther" "M2 M" "SlotDataBusWidth4X"
    		register "PcieRpSlotImplemented[8]" = "1"
    	end
-		device pci 1d.5 on	# PCIe root port 14 (PHY 0)
-			register "PcieRpSlotImplemented[13]" = "1"
+		device pci 1d.5 on end	# PCIe root port 14 (PHY 0)
+		device pci 1d.6 on end	# PCIe root port 15 (BMC)
+		device pci 1d.7 on	# PCIe root port 16 (M.2 E/CNVi)
+			# Disabled when CNVi is present
+			register "PcieRpSlotImplemented[15]" = "1"
    	end
-		device pci 1d.6 on	# PCIe root port 15 (BMC)
-			register "PcieRpSlotImplemented[14]" = "1"
-		end
-
    	device pci 1e.0 on  end # UART #0
    	device pci 1e.1 on  end # UART #1
    	device pci 1e.2 off end # GSPI #0