Change in coreboot[master]: mb/intel/tglrvp: Add initial mainboard code

[Wonkyu Kim (Code Review)]

Wonkyu Kim has uploaded a new patch set (#10) to the change originally created by Ravishankar Sarawadi. ( https://review.coreboot.org/c/coreboot/+/37868 )

Change subject: mb/intel/tglrvp: Add initial mainboard code
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mb/intel/tglrvp: Add initial mainboard code

This is a initial mainboard code aimed to serve as base for
further mainboard check-ins.

This is a copy patch from icelake_rvp as on commit ID:
I64db2460115f5fb35ca197b83440f8ee47470761

Below are the changes done over the copy patch:

1. Rename "Icelake" with "Tigerlake".
 2. Replace "icelake_rvp" with "tglrvp".
 3. Rename "icl" with "tgl".
 4. Remove unwanted SPD file, add empty SPD as
    placeholder.
 5. Replace "soc/intel/icelake" with "soc/intel/tigerlake".
 6. Empty romstage_fsp_params.c, to fill it later with
    SOC specific config.
 7. Empty GPIO configuration, to be filled as per board.
 8. Change copyright year to 2019.
 9. Add board support namely BOARD_INTEL_TGLRVP_UP3
 10. Replace icl_u and icl_y variant with tglrvp variant.
 11. Remove basebord gpio.c and rely on variant override.
 12. Remove HDA verb table and config support.

Changes to follow on top of this:
 1. Add correct memory parameters, add SPDs.
 2. Clean up devicetree as per tigerlake SOC.
 3. Add GPIO support.
 4. Update chromeos.fmd to make 32MB BIOS region.

TEST=Build tigerlake rvp board

Signed-off-by: Ravi Sarawadi 
Change-Id: I86ada611de1cf28a1b872eea35cf41c0dc1c57f1
---
A src/mainboard/intel/tglrvp/Kconfig
A src/mainboard/intel/tglrvp/Kconfig.name
A src/mainboard/intel/tglrvp/Makefile.inc
A src/mainboard/intel/tglrvp/acpi/mainboard.asl
A src/mainboard/intel/tglrvp/board_id.c
A src/mainboard/intel/tglrvp/board_id.h
A src/mainboard/intel/tglrvp/board_info.txt
A src/mainboard/intel/tglrvp/bootblock.c
A src/mainboard/intel/tglrvp/chromeos.c
A src/mainboard/intel/tglrvp/chromeos.fmd
A src/mainboard/intel/tglrvp/dsdt.asl
A src/mainboard/intel/tglrvp/mainboard.c
A src/mainboard/intel/tglrvp/romstage_fsp_params.c
A src/mainboard/intel/tglrvp/spd/Makefile.inc
A src/mainboard/intel/tglrvp/spd/empty.spd.hex
A src/mainboard/intel/tglrvp/spd/spd.h
A src/mainboard/intel/tglrvp/spd/spd_util.c
A src/mainboard/intel/tglrvp/variants/baseboard/include/baseboard/ec.h
A src/mainboard/intel/tglrvp/variants/baseboard/include/baseboard/gpio.h
A src/mainboard/intel/tglrvp/variants/baseboard/include/baseboard/variants.h
A src/mainboard/intel/tglrvp/variants/tglrvp_up3/Makefile.inc
A src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb
A src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c
23 files changed, 1,220 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/37868/10