Change in ...coreboot[master]: [WIP] mb/google/sarien: disable ISH UART

[Bora Guvendik (Code Review)]

Bora Guvendik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32187

Change subject: [WIP] mb/google/sarien: disable ISH UART
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[WIP] mb/google/sarien: disable ISH UART

Disable unused GPIO for logging to save power number.

BUG=none
TEST=Boot to OS

Change-Id: Icc7ff9e67380884cd3865f2864b9ec5faa86670c
Signed-off-by: Bora Guvendik 
---
M src/mainboard/google/sarien/variants/arcada/gpio.c
1 file changed, 2 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/32187/1

diff --git a/src/mainboard/google/sarien/variants/arcada/gpio.c b/src/mainboard/google/sarien/variants/arcada/gpio.c
index 1b06301..8f950cb 100644
--- a/src/mainboard/google/sarien/variants/arcada/gpio.c
+++ b/src/mainboard/google/sarien/variants/arcada/gpio.c
@@ -123,9 +123,9 @@
 /* ISH_SPI_MISO */	PAD_CFG_GPI(GPP_D11, NONE, DEEP), /* TBT_DET# */
 /* ISH_SPI_MOSI */	PAD_NC(GPP_D12, NONE),
    		/* ISH_CPU_UART0_RX */
-/* ISH_UART0_RXD */	PAD_CFG_NF(GPP_D13, NONE, DEEP, NF1),
+/* ISH_UART0_RXD */	PAD_NC(GPP_D13, NONE),
    		/* ISH_CPU_UART0_TX */
-/* ISH_UART0_TXD */	PAD_CFG_NF(GPP_D14, NONE, DEEP, NF1),
+/* ISH_UART0_TXD */	PAD_NC(GPP_D14, NONE),
 /* ISH_UART0_RTS# */	PAD_CFG_GPO(GPP_D15, 1, DEEP), /* WWAN_FULL_PWR_EN */
 /* ISH_UART0_CTS# */	PAD_NC(GPP_D16, NONE),
 /* DMIC_CLK1 */		PAD_CFG_GPI(GPP_D17, NONE, DEEP), /* KB_DET# */

[Bora Guvendik (Code Review)]

Bora Guvendik has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/32187 )

Change subject: [WIP] mb/google/sarien: disable ISH UART
......................................................................

Abandoned