Attention is currently required from: Tarun Tuli, Subrata Banik.
Dinesh Gehlot has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74256 )
Change subject: soc/intel/: Store CSE firmware version into cbmem table ......................................................................
Patch Set 4:
(3 comments)
File src/soc/intel/alderlake/romstage/romstage.c:
https://review.coreboot.org/c/coreboot/+/74256/comment/c1fc97ec_e773aa0c PS3, Line 235: DRIVERS_INTEL_ISH
if (CONFIG(SOC_INTEL_CSE_LITE_SYNC_IN_ROMSTAGE) && CONFIG(SOC_INTEL_GET_FIRMWARE_VERSIONS_FROM_CSE))
Ack
File src/soc/intel/common/block/cse/cse_lite.c:
https://review.coreboot.org/c/coreboot/+/74256/comment/8dc03b04_fad16e6c PS3, Line 1087: if (!cse_get_bp_info(&cse_bp_info))
suspect code indent for conditional statements (8, 24) […]
Ack
https://review.coreboot.org/c/coreboot/+/74256/comment/f5b072a4_6ef610fb PS3, Line 1184: ENV_RAMSTAGE
if (CONFIG(SOC_INTEL_CSE_LITE_SYNC_IN_RAMSTAGE) && CONFIG(SOC_INTEL_GET_FIRMWARE_VERSIONS_FROM_CSE))
Check for `SOC_INTEL_CSE_LITE_SYNC_IN_RAMSTAGE` may not require, it is already checked at parent if condition.
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Dinesh Gehlot (Code Review)