Hello Marco Chen,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/40834
to review the following change.
Change subject: mb/google/dedede: Read DRAM part number from CBI ......................................................................
mb/google/dedede: Read DRAM part number from CBI
The index of MEM_STRAPS will be migrated from per DRAM part number to per DRAM characteristic therefore one index mapped to a single SPD binary can represent to multiple DRAM part numbers as long as their characteristic is the same for DRAM controller to support. In this case, the real DRAM part number would be provisioned in the CBI instead of SPD in the factory flow. As a result, we need to extract DRAM part number from CBI.
BUG=b:152019429 BRANCH=None TEST=1. provision dram_part_num field of CBI 2. check DRAM part number is correct in SMBIOS for memory device
Change-Id: I40780a35e04efb279591e9db179cb86b5e907c0d Signed-off_by: Marco Chen marcochen@google.com
Change-Id: Icff8fc0fd01d5bd43bd4ae40926cdec7e78ea454 --- M src/mainboard/google/dedede/romstage.c 1 file changed, 31 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/40834/1
diff --git a/src/mainboard/google/dedede/romstage.c b/src/mainboard/google/dedede/romstage.c index 2efaaf1..a5ded5f 100644 --- a/src/mainboard/google/dedede/romstage.c +++ b/src/mainboard/google/dedede/romstage.c @@ -6,9 +6,13 @@ */
#include <baseboard/variants.h> +#include <console/console.h> +#include <ec/google/chromeec/ec.h> #include <gpio.h> +#include <memory_info.h> #include <soc/meminit.h> #include <soc/romstage.h> +#include <string.h> #include <variant/gpio.h>
void mainboard_memory_init_params(FSPM_UPD *memupd) @@ -22,3 +26,30 @@
memcfg_init(&memupd->FspmConfig, board_cfg, &spd_info, half_populated); } + +bool mainboard_get_dram_part_num(const char **part_num, size_t *len) +{ + static char part_num_store[DIMM_INFO_PART_NUMBER_SIZE]; + static enum { + PART_NUM_NOT_READ, + PART_NUM_AVAILABLE, + PART_NUM_NOT_IN_CBI, + } part_num_state = PART_NUM_NOT_READ; + + if (part_num_state == PART_NUM_NOT_READ) { + if (google_chromeec_cbi_get_dram_part_num(&part_num_store[0], + sizeof(part_num_store)) < 0) { + printk(BIOS_ERR, "No DRAM part number in CBI!\n"); + part_num_state = PART_NUM_NOT_IN_CBI; + } else { + part_num_state = PART_NUM_AVAILABLE; + } + } + + if (part_num_state == PART_NUM_NOT_IN_CBI) + return false; + + *part_num = &part_num_store[0]; + *len = strlen(part_num_store) + 1; + return true; +}
Hello build bot (Jenkins), Marco Chen,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/40834
to look at the new patch set (#2).
Change subject: mb/google/dedede: Read DRAM part number from CBI ......................................................................
mb/google/dedede: Read DRAM part number from CBI
The index of MEM_STRAPS will be migrated from per DRAM part number to per DRAM characteristic therefore one index mapped to a single SPD binary can represent to multiple DRAM part numbers as long as their characteristic is the same for DRAM controller to support. In this case, the real DRAM part number would be provisioned in the CBI instead of SPD in the factory flow. As a result, we need to extract DRAM part number from CBI.
BUG=b:152019429 BRANCH=None TEST=1. provision dram_part_num field of CBI 2. check DRAM part number is correct in SMBIOS for memory device
Change-Id: I40780a35e04efb279591e9db179cb86b5e907c0d Signed-off_by: Marco Chen marcochen@google.com
Change-Id: Icff8fc0fd01d5bd43bd4ae40926cdec7e78ea454 --- M src/mainboard/google/dedede/romstage.c 1 file changed, 31 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/40834/2
Marco Chen has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/40834 )
Change subject: mb/google/dedede: Read DRAM part number from CBI ......................................................................
Abandoned
-
Marco Chen (Code Review)