Change in coreboot[master]: sc7280: HACK PATCH: mmu configuration for ddr as bypassing qclib exec...

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Ravi kumar (Code Review)

1 Nov 2020 1 Nov '20

8:15 p.m.

Ravi kumar has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47080 )

Change subject: sc7280: HACK PATCH: mmu configuration for ddr as bypassing qclib execution ......................................................................

sc7280: HACK PATCH: mmu configuration for ddr as bypassing qclib execution

Change-Id: I213f6063ba8a06740488f44dabf377659bb70579 --- M src/mainboard/google/herobrine/romstage.c M src/soc/qualcomm/sc7280/mmu.c 2 files changed, 3 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/47080/1

diff --git a/src/mainboard/google/herobrine/romstage.c b/src/mainboard/google/herobrine/romstage.c index 8844f18..9927677 100644 --- a/src/mainboard/google/herobrine/romstage.c +++ b/src/mainboard/google/herobrine/romstage.c @@ -6,5 +6,5 @@ void platform_romstage_main(void) { /* QCLib: DDR init & train */ - qclib_load_and_run(); + //qclib_load_and_run(); } diff --git a/src/soc/qualcomm/sc7280/mmu.c b/src/soc/qualcomm/sc7280/mmu.c index 9905c29..f6e85a6 100644 --- a/src/soc/qualcomm/sc7280/mmu.c +++ b/src/soc/qualcomm/sc7280/mmu.c @@ -16,6 +16,8 @@ mmu_config_range((void *)_bsram, REGION_SIZE(bsram), CACHED_RAM); mmu_config_range((void *)_dma_coherent, REGION_SIZE(dma_coherent), UNCACHED_RAM); + mmu_config_range((void *)_ssram, REGION_SIZE(ssram), CACHED_RAM); + mmu_config_range((void *)(2UL * GiB), (2UL * GiB) , CACHED_RAM);

mmu_enable(); }

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build bot (Jenkins) (Code Review)

1 Nov 1 Nov

8:21 p.m.

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47080 )

Change subject: sc7280: HACK PATCH: mmu configuration for ddr as bypassing qclib execution ......................................................................

Patch Set 1:

(1 comment)

https://review.coreboot.org/c/coreboot/+/47080/1/src/soc/qualcomm/sc7280/mmu... File src/soc/qualcomm/sc7280/mmu.c:

https://review.coreboot.org/c/coreboot/+/47080/1/src/soc/qualcomm/sc7280/mmu... PS1, Line 20: mmu_config_range((void *)(2UL * GiB), (2UL * GiB) , CACHED_RAM); space prohibited before that ',' (ctx:WxW)

-- To view, visit https://review.coreboot.org/c/coreboot/+/47080 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I213f6063ba8a06740488f44dabf377659bb70579 Gerrit-Change-Number: 47080 Gerrit-PatchSet: 1 Gerrit-Owner: Ravi kumar rbokka@codeaurora.org Gerrit-CC: build bot (Jenkins) no-reply@coreboot.org Gerrit-Comment-Date: Sun, 01 Nov 2020 20:21:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

Ravi kumar (Code Review)

2 Nov 2 Nov

11:13 p.m.

New subject: Change in coreboot[master]: HACK sc7280: mmu configuration for ddr as bypassing qclib execution

Hello build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/47080

to look at the new patch set (#2).

Change subject: HACK sc7280: mmu configuration for ddr as bypassing qclib execution ......................................................................

HACK sc7280: mmu configuration for ddr as bypassing qclib execution

Change-Id: I213f6063ba8a06740488f44dabf377659bb70579 --- M src/mainboard/google/herobrine/romstage.c M src/soc/qualcomm/sc7280/mmu.c 2 files changed, 3 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/47080/2

-- To view, visit https://review.coreboot.org/c/coreboot/+/47080 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I213f6063ba8a06740488f44dabf377659bb70579 Gerrit-Change-Number: 47080 Gerrit-PatchSet: 2 Gerrit-Owner: Ravi kumar rbokka@codeaurora.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-MessageType: newpatchset

build bot (Jenkins) (Code Review)

11:54 p.m.

New subject: Change in coreboot[master]: HACK sc7280: mmu configuration for ddr as bypassing qclib execution

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47080 )

Change subject: HACK sc7280: mmu configuration for ddr as bypassing qclib execution ......................................................................

Patch Set 2:

(1 comment)

https://review.coreboot.org/c/coreboot/+/47080/2/src/soc/qualcomm/sc7280/mmu... File src/soc/qualcomm/sc7280/mmu.c:

https://review.coreboot.org/c/coreboot/+/47080/2/src/soc/qualcomm/sc7280/mmu... PS2, Line 20: mmu_config_range((void *)(2UL * GiB), (2UL * GiB) , CACHED_RAM); space prohibited before that ',' (ctx:WxW)

-- To view, visit https://review.coreboot.org/c/coreboot/+/47080 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I213f6063ba8a06740488f44dabf377659bb70579 Gerrit-Change-Number: 47080 Gerrit-PatchSet: 2 Gerrit-Owner: Ravi kumar rbokka@codeaurora.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Comment-Date: Mon, 02 Nov 2020 23:54:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

build bot (Jenkins) (Code Review)

5 Nov 5 Nov

9:56 p.m.

New subject: Change in coreboot[master]: HACK sc7280: mmu configuration for ddr as bypassing qclib execution

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47080 )

Change subject: HACK sc7280: mmu configuration for ddr as bypassing qclib execution ......................................................................

Patch Set 3:

(1 comment)

https://review.coreboot.org/c/coreboot/+/47080/3/src/soc/qualcomm/sc7280/mmu... File src/soc/qualcomm/sc7280/mmu.c:

https://review.coreboot.org/c/coreboot/+/47080/3/src/soc/qualcomm/sc7280/mmu... PS3, Line 20: mmu_config_range((void *)(2UL * GiB), (2UL * GiB) , CACHED_RAM); space prohibited before that ',' (ctx:WxW)

-- To view, visit https://review.coreboot.org/c/coreboot/+/47080 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I213f6063ba8a06740488f44dabf377659bb70579 Gerrit-Change-Number: 47080 Gerrit-PatchSet: 3 Gerrit-Owner: Ravi kumar rbokka@codeaurora.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-Reviewer: mturney mturney mturney@codeaurora.org Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Comment-Date: Thu, 05 Nov 2020 21:56:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

build bot (Jenkins) (Code Review)

10:59 p.m.

New subject: Change in coreboot[master]: HACK sc7280: mmu configuration for ddr as bypassing qclib execution

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47080 )

Change subject: HACK sc7280: mmu configuration for ddr as bypassing qclib execution ......................................................................

Patch Set 4:

(1 comment)

https://review.coreboot.org/c/coreboot/+/47080/4/src/soc/qualcomm/sc7280/mmu... File src/soc/qualcomm/sc7280/mmu.c:

https://review.coreboot.org/c/coreboot/+/47080/4/src/soc/qualcomm/sc7280/mmu... PS4, Line 20: mmu_config_range((void *)(2UL * GiB), (2UL * GiB) , CACHED_RAM); space prohibited before that ',' (ctx:WxW)

-- To view, visit https://review.coreboot.org/c/coreboot/+/47080 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I213f6063ba8a06740488f44dabf377659bb70579 Gerrit-Change-Number: 47080 Gerrit-PatchSet: 4 Gerrit-Owner: Ravi kumar rbokka@codeaurora.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-Reviewer: mturney mturney mturney@codeaurora.org Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Comment-Date: Thu, 05 Nov 2020 22:59:48 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

build bot (Jenkins) (Code Review)

6 Nov 6 Nov

6:33 a.m.

New subject: Change in coreboot[master]: HACK sc7280: mmu configuration for ddr as bypassing qclib execution

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47080 )

Change subject: HACK sc7280: mmu configuration for ddr as bypassing qclib execution ......................................................................

Patch Set 5:

(1 comment)

https://review.coreboot.org/c/coreboot/+/47080/5/src/soc/qualcomm/sc7280/mmu... File src/soc/qualcomm/sc7280/mmu.c:

https://review.coreboot.org/c/coreboot/+/47080/5/src/soc/qualcomm/sc7280/mmu... PS5, Line 20: mmu_config_range((void *)(2UL * GiB), (2UL * GiB) , CACHED_RAM); space prohibited before that ',' (ctx:WxW)

-- To view, visit https://review.coreboot.org/c/coreboot/+/47080 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I213f6063ba8a06740488f44dabf377659bb70579 Gerrit-Change-Number: 47080 Gerrit-PatchSet: 5 Gerrit-Owner: Ravi kumar rbokka@codeaurora.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-Reviewer: mturney mturney mturney@codeaurora.org Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Comment-Date: Fri, 06 Nov 2020 06:33:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

build bot (Jenkins) (Code Review)

9 Nov 9 Nov

5:35 p.m.

New subject: Change in coreboot[master]: HACK sc7280: mmu configuration for ddr as bypassing qclib execution

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47080 )

Change subject: HACK sc7280: mmu configuration for ddr as bypassing qclib execution ......................................................................

Patch Set 6:

(1 comment)

https://review.coreboot.org/c/coreboot/+/47080/6/src/soc/qualcomm/sc7280/mmu... File src/soc/qualcomm/sc7280/mmu.c:

https://review.coreboot.org/c/coreboot/+/47080/6/src/soc/qualcomm/sc7280/mmu... PS6, Line 20: mmu_config_range((void *)(2UL * GiB), (2UL * GiB) , CACHED_RAM); space prohibited before that ',' (ctx:WxW)

-- To view, visit https://review.coreboot.org/c/coreboot/+/47080 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I213f6063ba8a06740488f44dabf377659bb70579 Gerrit-Change-Number: 47080 Gerrit-PatchSet: 6 Gerrit-Owner: Ravi kumar rbokka@codeaurora.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-Reviewer: mturney mturney mturney@codeaurora.org Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Comment-Date: Mon, 09 Nov 2020 17:35:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

build bot (Jenkins) (Code Review)

12 Nov 12 Nov

3:48 a.m.

New subject: Change in coreboot[master]: HACK sc7280: mmu configuration for ddr as bypassing qclib execution

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47080 )

Change subject: HACK sc7280: mmu configuration for ddr as bypassing qclib execution ......................................................................

Patch Set 7:

(1 comment)

https://review.coreboot.org/c/coreboot/+/47080/7/src/soc/qualcomm/sc7280/mmu... File src/soc/qualcomm/sc7280/mmu.c:

https://review.coreboot.org/c/coreboot/+/47080/7/src/soc/qualcomm/sc7280/mmu... PS7, Line 20: mmu_config_range((void *)(2UL * GiB), (2UL * GiB) , CACHED_RAM); space prohibited before that ',' (ctx:WxW)

-- To view, visit https://review.coreboot.org/c/coreboot/+/47080 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I213f6063ba8a06740488f44dabf377659bb70579 Gerrit-Change-Number: 47080 Gerrit-PatchSet: 7 Gerrit-Owner: Ravi kumar rbokka@codeaurora.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-Reviewer: mturney mturney mturney@codeaurora.org Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Comment-Date: Thu, 12 Nov 2020 03:48:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

build bot (Jenkins) (Code Review)

6:28 p.m.

New subject: Change in coreboot[master]: HACK sc7280: mmu configuration for ddr as bypassing qclib execution

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47080 )

Change subject: HACK sc7280: mmu configuration for ddr as bypassing qclib execution ......................................................................

Patch Set 8:

(1 comment)

https://review.coreboot.org/c/coreboot/+/47080/8/src/soc/qualcomm/sc7280/mmu... File src/soc/qualcomm/sc7280/mmu.c:

https://review.coreboot.org/c/coreboot/+/47080/8/src/soc/qualcomm/sc7280/mmu... PS8, Line 20: mmu_config_range((void *)(2UL * GiB), (2UL * GiB) , CACHED_RAM); space prohibited before that ',' (ctx:WxW)

-- To view, visit https://review.coreboot.org/c/coreboot/+/47080 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I213f6063ba8a06740488f44dabf377659bb70579 Gerrit-Change-Number: 47080 Gerrit-PatchSet: 8 Gerrit-Owner: Ravi kumar rbokka@codeaurora.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-Reviewer: mturney mturney mturney@codeaurora.org Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Comment-Date: Thu, 12 Nov 2020 18:28:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

build bot (Jenkins) (Code Review)

24 Nov 24 Nov

11:10 a.m.

New subject: Change in coreboot[master]: HACK sc7280: mmu configuration for ddr as bypassing qclib execution

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47080 )

Change subject: HACK sc7280: mmu configuration for ddr as bypassing qclib execution ......................................................................

Patch Set 9:

(1 comment)

https://review.coreboot.org/c/coreboot/+/47080/9/src/soc/qualcomm/sc7280/mmu... File src/soc/qualcomm/sc7280/mmu.c:

https://review.coreboot.org/c/coreboot/+/47080/9/src/soc/qualcomm/sc7280/mmu... PS9, Line 20: mmu_config_range((void *)(2UL * GiB), (2UL * GiB) , CACHED_RAM); space prohibited before that ',' (ctx:WxW)

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build bot (Jenkins) (Code Review)

9 Dec 9 Dec

6:39 p.m.

New subject: Change in coreboot[master]: HACK sc7280: mmu configuration for ddr as bypassing qclib execution

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47080 )

Change subject: HACK sc7280: mmu configuration for ddr as bypassing qclib execution ......................................................................

Patch Set 10:

(1 comment)

https://review.coreboot.org/c/coreboot/+/47080/10/src/soc/qualcomm/sc7280/mm... File src/soc/qualcomm/sc7280/mmu.c:

https://review.coreboot.org/c/coreboot/+/47080/10/src/soc/qualcomm/sc7280/mm... PS10, Line 20: mmu_config_range((void *)(2UL * GiB), (2UL * GiB) , CACHED_RAM); space prohibited before that ',' (ctx:WxW)

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build bot (Jenkins) (Code Review)

30 Dec 30 Dec

9:12 a.m.

New subject: Change in coreboot[master]: HACK sc7280: mmu configuration for ddr as bypassing qclib execution

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47080 )

Change subject: HACK sc7280: mmu configuration for ddr as bypassing qclib execution ......................................................................

Patch Set 11:

(1 comment)

https://review.coreboot.org/c/coreboot/+/47080/11/src/soc/qualcomm/sc7280/mm... File src/soc/qualcomm/sc7280/mmu.c:

https://review.coreboot.org/c/coreboot/+/47080/11/src/soc/qualcomm/sc7280/mm... PS11, Line 20: mmu_config_range((void *)(2UL * GiB), (2UL * GiB) , CACHED_RAM); space prohibited before that ',' (ctx:WxW)

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build bot (Jenkins) (Code Review)

12 Jan 12 Jan

8:17 a.m.

New subject: Change in coreboot[master]: HACK sc7280: mmu configuration for ddr as bypassing qclib execution

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47080 )

Change subject: HACK sc7280: mmu configuration for ddr as bypassing qclib execution ......................................................................

Patch Set 12:

(1 comment)

File src/soc/qualcomm/sc7280/mmu.c:

https://review.coreboot.org/c/coreboot/+/47080/comment/8baf3a4d_ab2481a4 PS12, Line 20: mmu_config_range((void *)(2UL * GiB), (2UL * GiB) , CACHED_RAM); space prohibited before that ',' (ctx:WxW)

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build bot (Jenkins) (Code Review)

13 Jan 13 Jan

2:04 p.m.

New subject: Change in coreboot[master]: HACK sc7280: mmu configuration for ddr as bypassing qclib execution

Attention is currently required from: Ravi kumar. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47080 )

Change subject: HACK sc7280: mmu configuration for ddr as bypassing qclib execution ......................................................................

Patch Set 13:

(1 comment)

File src/soc/qualcomm/sc7280/mmu.c:

https://review.coreboot.org/c/coreboot/+/47080/comment/cbb75af6_de9db53f PS13, Line 20: mmu_config_range((void *)(2UL * GiB), (2UL * GiB) , CACHED_RAM); space prohibited before that ',' (ctx:WxW)

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build bot (Jenkins) (Code Review)

20 Jan 20 Jan

10:05 p.m.

New subject: Change in coreboot[master]: HACK sc7280: mmu configuration for ddr as bypassing qclib execution

Attention is currently required from: Ravi kumar. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47080 )

Change subject: HACK sc7280: mmu configuration for ddr as bypassing qclib execution ......................................................................

Patch Set 14:

(1 comment)

File src/soc/qualcomm/sc7280/mmu.c:

https://review.coreboot.org/c/coreboot/+/47080/comment/f46d55c5_f297debe PS14, Line 20: mmu_config_range((void *)(2UL * GiB), (2UL * GiB) , CACHED_RAM); space prohibited before that ',' (ctx:WxW)

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Ravi Kumar Bokka (Code Review)

22 Mar 22 Mar

9:30 a.m.

New subject: Change in coreboot[master]: HACK sc7280: mmu configuration for ddr as bypassing qclib execution

Ravi Kumar Bokka has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/47080 )

Change subject: HACK sc7280: mmu configuration for ddr as bypassing qclib execution ......................................................................

Abandoned

abandon these changes as we used for bringup stage. unfortunately uploaded

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coreboot-gerrit@coreboot.org

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build bot (Jenkins) (Code Review)
Ravi kumar (Code Review)
Ravi Kumar Bokka (Code Review)