Attention is currently required from: V Sowmya, Subrata Banik, Maulik V Vaghela, Angel Pons, Tim Wawrzynczak, EricR Lai.
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59976 )
Change subject: mb/intel/adlrvp: Add support for external clock buffer
......................................................................
Patch Set 9: Code-Review+2
(2 comments)
File src/mainboard/intel/adlrvp/romstage_fsp_params.c:
https://review.coreboot.org/c/coreboot/+/59976/comment/8d2f55a4_f4f89819
PS9, Line 29: . Rests
`, the rest are `
https://review.coreboot.org/c/coreboot/+/59976/comment/73ff512e_53cacc6e
PS9, Line 29: Now if more than 4 PCH devices
: * connected on the platform, external differential buffer chip needs to be placed at
: * platform level.
`If more than 4 PCH devices are connected on the platform, an external differential buffer chip needs to be placed at the platform level.`
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