Change in coreboot[master]: soc/intel/alderlake: Remove obsolete CNVi Bluetooth PCI device

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/51352 )

Change subject: soc/intel/alderlake: Remove obsolete CNVi Bluetooth PCI device
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soc/intel/alderlake: Remove obsolete CNVi Bluetooth PCI device

There is no PCI host interface for Cnvi BT in Alderlake.
CNVi BT on Alderlake is an USB device.

Change-Id: I3e08c6d6f00e81267dc28c9b37b2dfff5cd75db1
Signed-off-by: Cliff Huang 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51352
Reviewed-by: Furquan Shaikh 
Tested-by: build bot (Jenkins) 
---
M src/soc/intel/alderlake/chipset.cb
M src/soc/intel/alderlake/include/soc/pci_devs.h
2 files changed, 0 insertions(+), 3 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Furquan Shaikh: Looks good to me, approved

diff --git a/src/soc/intel/alderlake/chipset.cb b/src/soc/intel/alderlake/chipset.cb
index cd9ebf9..19411a6 100644
--- a/src/soc/intel/alderlake/chipset.cb
+++ b/src/soc/intel/alderlake/chipset.cb
@@ -60,7 +60,6 @@
    	device pci 0e.0 alias vmd off end
    	device pci 10.0 alias thc0 off end
    	device pci 10.1 alias thc1 off end
-		device pci 10.2 alias cnvi_bt off end
    	device pci 12.0 alias ish off end
    	device pci 12.6 alias gspi2 off end
    	device pci 13.0 alias gspi3 off end
diff --git a/src/soc/intel/alderlake/include/soc/pci_devs.h b/src/soc/intel/alderlake/include/soc/pci_devs.h
index 6a114ae..23cf248 100644
--- a/src/soc/intel/alderlake/include/soc/pci_devs.h
+++ b/src/soc/intel/alderlake/include/soc/pci_devs.h
@@ -73,10 +73,8 @@
 #define PCH_DEV_SLOT_SIO0	0x10
 #define  PCH_DEVFN_THC0		_PCH_DEVFN(SIO0, 0)
 #define  PCH_DEVFN_THC1		_PCH_DEVFN(SIO0, 1)
-#define  PCH_DEVFN_CNVI_BT	_PCH_DEVFN(SIO0, 2)
 #define  PCH_DEV_THC0		_PCH_DEV(SIO0, 0)
 #define  PCH_DEV_THC1		_PCH_DEV(SIO0, 1)
-#define  PCH_DEV_CNVI_BT	_PCH_DEV(SIO0, 2)

#define PCH_DEV_SLOT_ISH	0x12
 #define  PCH_DEVFN_ISH		_PCH_DEVFN(ISH, 0)