[M] Change in coreboot[main]: mb/nissa/var/meliks: Choose active storage by using FW_CONFIG

[Matt DeVillier (Code Review)]

Matt DeVillier has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86980?usp=email )

Change subject: mb/nissa/var/meliks: Choose active storage by using FW_CONFIG
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mb/nissa/var/meliks: Choose active storage by using FW_CONFIG

Select UFS or eMMC as the active storage of meliks boards by using
`STORAGE` field in `FW_CONFIG`.

BUG=none
BRANCH=nissa
TEST=FW_NAME=meliks emerge-nissa coreboot

Change-Id: Ifcc917ad1231fa68ce4caf6f0d67fa75b16a3085
Signed-off-by: Seunghwan Kim 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86980
Reviewed-by: Kapil Porwal 
Tested-by: build bot (Jenkins) 
---
M src/mainboard/google/brya/variants/meliks/Makefile.mk
A src/mainboard/google/brya/variants/meliks/fw_config.c
M src/mainboard/google/brya/variants/meliks/overridetree.cb
3 files changed, 53 insertions(+), 1 deletion(-)

Approvals:
  Kapil Porwal: Looks good to me, approved
  build bot (Jenkins): Verified

diff --git a/src/mainboard/google/brya/variants/meliks/Makefile.mk b/src/mainboard/google/brya/variants/meliks/Makefile.mk
index 227b163..bc560b8 100644
--- a/src/mainboard/google/brya/variants/meliks/Makefile.mk
+++ b/src/mainboard/google/brya/variants/meliks/Makefile.mk
@@ -3,4 +3,5 @@

romstage-y += memory.c

+ramstage-$(CONFIG_FW_CONFIG) += fw_config.c
 ramstage-y += gpio.c
diff --git a/src/mainboard/google/brya/variants/meliks/fw_config.c b/src/mainboard/google/brya/variants/meliks/fw_config.c
new file mode 100644
index 0000000..c4e6a1b
--- /dev/null
+++ b/src/mainboard/google/brya/variants/meliks/fw_config.c
@@ -0,0 +1,46 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <baseboard/gpio.h>
+#include <baseboard/variants.h>
+#include <console/console.h>
+#include <fw_config.h>
+
+static const struct pad_config emmc_disable_pads[] = {
+	/* I7  : EMMC_CMD */
+	PAD_NC(GPP_I7, NONE),
+	/* I8  : EMMC_D0 */
+	PAD_NC(GPP_I8, NONE),
+	/* I9  : EMMC_D1 */
+	PAD_NC(GPP_I9, NONE),
+	/* I10 : EMMC_D2 */
+	PAD_NC(GPP_I10, NONE),
+	/* I11 : EMMC_D3 */
+	PAD_NC(GPP_I11, NONE),
+	/* I12 : EMMC_D4 */
+	PAD_NC(GPP_I12, NONE),
+	/* I13 : EMMC_D5 */
+	PAD_NC(GPP_I13, NONE),
+	/* I14 : EMMC_D6 */
+	PAD_NC(GPP_I14, NONE),
+	/* I15 : EMMC_D7 */
+	PAD_NC(GPP_I15, NONE),
+	/* I16 : EMMC_RCLK */
+	PAD_NC(GPP_I16, NONE),
+	/* I17 : EMMC_CLK */
+	PAD_NC(GPP_I17, NONE),
+	/* I18 : EMMC_RST_L */
+	PAD_NC(GPP_I18, NONE),
+};
+
+void fw_config_gpio_padbased_override(struct pad_config *padbased_table)
+{
+	// Check if FW_CONFIG is provisioned
+	if (!fw_config_is_provisioned())
+		return;
+
+	if (!fw_config_probe(FW_CONFIG(STORAGE, STORAGE_EMMC))) {
+		printk(BIOS_INFO, "Disable eMMC SSD GPIO pins.\n");
+		gpio_padbased_override(padbased_table, emmc_disable_pads,
+						ARRAY_SIZE(emmc_disable_pads));
+	}
+}
diff --git a/src/mainboard/google/brya/variants/meliks/overridetree.cb b/src/mainboard/google/brya/variants/meliks/overridetree.cb
index eefa40b..f522ed3 100644
--- a/src/mainboard/google/brya/variants/meliks/overridetree.cb
+++ b/src/mainboard/google/brya/variants/meliks/overridetree.cb
@@ -392,13 +392,18 @@
    	end
    	device ref pcie_rp7 off end
    	device ref pcie_rp9 off end
+		device ref emmc on
+			probe STORAGE STORAGE_EMMC
+		end
    	device ref ish on
    		chip drivers/intel/ish
    			register "add_acpi_dma_property" = "true"
    			device generic 0 on end
    		end
    	end
-		device ref ufs on end
+		device ref ufs on
+			probe STORAGE STORAGE_UFS
+		end
    	device ref pch_espi on
    		chip ec/google/chromeec
    			use conn0 as mux_conn[0]