Hello build bot (Jenkins), coreboot org,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/18305
to look at the new patch set (#29).
Change subject: nb/i945/raminit: Use common ddr2 decode functions ......................................................................
nb/i945/raminit: Use common ddr2 decode functions
This simplifies computing dram timings a lot.
This removes computation of rank size based on columns, rows, banks,... and uses the information in SPD byte 31. The result of this is that dimms with multiple asymmetric ranks are not supported anymore. These however are very rare and most likely never tested on this platform.
Change-Id: I97c93939d11807752797785dd88c70b43a236ee3 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/northbridge/intel/i945/raminit.c M src/northbridge/intel/i945/raminit.h 2 files changed, 149 insertions(+), 616 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/18305/29