Change in coreboot[master]: soc/amd/picasso/mca: don't do out of bounds array accesses

[Felix Held (Code Review)]

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson.
Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/51477 )

Change subject: soc/amd/picasso/mca: don't do out of bounds array accesses
......................................................................

soc/amd/picasso/mca: don't do out of bounds array accesses

The Picasso APUs advertise 23 MCA banks in the lower byte of the
IA32_MCG_CAP MSR, which is more than the 7 core MCA banks.

Signed-off-by: Felix Held 
Change-Id: I3e1c8ed437820b350c78b0517e6521582002ee1e
---
M src/soc/amd/picasso/mca.c
1 file changed, 2 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/51477/1

diff --git a/src/soc/amd/picasso/mca.c b/src/soc/amd/picasso/mca.c
index 5471a6b..8ea5276 100644
--- a/src/soc/amd/picasso/mca.c
+++ b/src/soc/amd/picasso/mca.c
@@ -162,7 +162,8 @@
    			int core = cpuid_ebx(1) >> 24;

printk(BIOS_WARNING, "#MC Error: core %d, bank %d %s\n",
-						core, i, mca_bank_name[i]);
+				       core, i,
+				       i < ARRAY_SIZE(mca_bank_name) ? mca_bank_name[i] : "");

printk(BIOS_WARNING, "   MC%d_STATUS =   %08x_%08x\n",
    					i, mci.sts.hi, mci.sts.lo);