[XS] Change in coreboot[master]: soc/intel/{alderlake, meteorlake}: Properly assign the FSP ASPM UPD

[Tim Crawford (Code Review)]

Attention is currently required from: Felix Singer, Kapil Porwal, Sean Rhodes, Subrata Banik, Tarun Tuli.

Tim Crawford has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75481?usp=email )

Change subject: soc/intel/{alderlake, meteorlake}: Properly assign the FSP ASPM UPD
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Patch Set 1:

(1 comment)

File src/soc/intel/alderlake/fsp_params.c:

https://review.coreboot.org/c/coreboot/+/75481/comment/c2b1029f_24f9ec6b :
PS1, Line 899: 	if (rp_cfg->pcie_rp_aspm)
             : 			s_cfg->PcieRpAspm[i] = get_aspm_control(rp_cfg->pcie_rp_aspm);
             : 		else if (CONFIG(PCIEXP_ASPM)) /* use auto (FSP default) if PCIEXP_ASPM is enabled */
             : 			s_cfg->PcieRpAspm[i] = ASPM_AUTO;
             : 		else
             : 			s_cfg->PcieRpAspm[i] = ASPM_DISABLE;
> > Those aren't disjoint cases. I want both of them. […]

`pcie_rp_aspm` is a *per port* config. So AFAICT, the only way to have ASPM enabled on some ports and disabled on others *is* to disable `PCIEXP_ASPM` and explicitly set `pcie_rp_aspm` per port.

If you leave `PCIEXP_ASPM` enabled and set `pcie_rp_aspm = ASPM_DISABLE` for a single port, then this still sets it to `ASPM_AUTO`.

e.g., CB:63466