[M] Change in coreboot[main]: sio/nuvoton: Implement a common ramstage ACPI LDN helper

[Keith Hui (Code Review)]

Attention is currently required from: Nico Huber, Paul Menzel.

Hello Nico Huber, Paul Menzel,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/82632?usp=email

to look at the new patch set (#4).

Change subject: sio/nuvoton: Implement a common ramstage ACPI LDN helper
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sio/nuvoton: Implement a common ramstage ACPI LDN helper

With few exceptions, Nuvoton super I/O chips have the same
configuration registers.

This patch provides a helper function for configuring the ACPI logical
device on Nuvoton SIOs, covering system power state after power loss
and switching PS/2 port roles between keyboard and mouse, both
controllable using nvram options.

This patch covers nct5572d, nct6776, nct6779d, nct6791d. Change all to
use this common code, and add HAVE_POWER_STATE_AFTER_FAILURE Kconfig to
all that don't have it already.

It extends these features to Nuvoton SIOs that currently lack them, with
additional improvements:

1. Enable waking up the system from PS/2 keyboard and/or mouse.
2. Establish an "off" state for "user-defined" power state after failure.
   This mode is not used by coreboot.

The nvram options have to be added individually to mainboards.

TEST=Both features boot tested on asus/p8z77-m which uses
sio/nuvoton/nct6779d.

Change-Id: Ibaddcaa2d77c5b06ddfbb6dbaac00df5e72dd4bd
Signed-off-by: Keith Hui 
---
M src/superio/nuvoton/Makefile.mk
A src/superio/nuvoton/common/common.c
A src/superio/nuvoton/common/common.h
M src/superio/nuvoton/nct5572d/superio.c
M src/superio/nuvoton/nct6776/Kconfig
M src/superio/nuvoton/nct6776/superio.c
M src/superio/nuvoton/nct6779d/Kconfig
M src/superio/nuvoton/nct6779d/superio.c
M src/superio/nuvoton/nct6791d/Kconfig
M src/superio/nuvoton/nct6791d/superio.c
10 files changed, 116 insertions(+), 14 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/82632/4