Attention is currently required from: Jason Glenesk, Raul Rangel, Matt DeVillier, Fred Reitberger, Felix Held.
Robert Zieba has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69917 )
Change subject: soc/amd/cezanne: Update XHCI GPE to use constant ......................................................................
soc/amd/cezanne: Update XHCI GPE to use constant
The GPE number used for XHCI has now been defined in AMD's common code This commit changes over existing code to use this new definition.
BRANCH=guybrush BUG=b:186792595 TEST=Ran on nipperkin device and verified that XHCI events string use GPE 31.
Signed-off-by: Robert Zieba robertzieba@google.com Change-Id: I9c2a44f7d2eb47422ae8c585e5e01ea0b420d461 --- M src/soc/amd/cezanne/xhci.c 1 file changed, 21 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/69917/1
diff --git a/src/soc/amd/cezanne/xhci.c b/src/soc/amd/cezanne/xhci.c index f599007..b0205c6 100644 --- a/src/soc/amd/cezanne/xhci.c +++ b/src/soc/amd/cezanne/xhci.c @@ -2,6 +2,7 @@
#include <amdblocks/gpio.h> #include <amdblocks/smi.h> +#include <amdblocks/xhci.h> #include <bootstate.h> #include <device/device.h> #include <drivers/usb/pci_xhci/pci_xhci.h> @@ -11,13 +12,13 @@ static const struct sci_source xhci_sci_sources[] = { { .scimap = SMITYPE_XHC0_PME, - .gpe = GEVENT_31, + .gpe = XHCI_GEVENT, .direction = SMI_SCI_LVL_HIGH, .level = SMI_SCI_EDG }, { .scimap = SMITYPE_XHC1_PME, - .gpe = GEVENT_31, + .gpe = XHCI_GEVENT, .direction = SMI_SCI_LVL_HIGH, .level = SMI_SCI_EDG }