Change in coreboot[master]: soc/intel: Factor out `select CPU_INTEL_COMMON`

[Angel Pons (Code Review)]

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45042 )

Change subject: soc/intel: Factor out `select CPU_INTEL_COMMON`
......................................................................

soc/intel: Factor out `select CPU_INTEL_COMMON`

All affected platforms select `SOC_INTEL_COMMON_BLOCK_CPU` already.

Change-Id: Iedcd3073b8e0287908eab1d886d2d5efff09088b
Signed-off-by: Angel Pons 
---
M src/soc/intel/apollolake/Kconfig
M src/soc/intel/broadwell/Kconfig
M src/soc/intel/cannonlake/Kconfig
M src/soc/intel/common/block/cpu/Kconfig
M src/soc/intel/denverton_ns/Kconfig
M src/soc/intel/icelake/Kconfig
M src/soc/intel/jasperlake/Kconfig
M src/soc/intel/skylake/Kconfig
M src/soc/intel/tigerlake/Kconfig
M src/soc/intel/xeon_sp/Kconfig
10 files changed, 1 insertion(+), 9 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/45042/1

diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index 96808cf..964e7d4 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -28,7 +28,6 @@
    select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH
    select BOOT_DEVICE_SUPPORTS_WRITES
    # CPU specific options
-	select CPU_INTEL_COMMON
    select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
    select IOAPIC
    select PCR_COMMON_IOSF_1_0
diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig
index 156d58a..66030b1 100644
--- a/src/soc/intel/broadwell/Kconfig
+++ b/src/soc/intel/broadwell/Kconfig
@@ -15,7 +15,6 @@
    select BOOT_DEVICE_SUPPORTS_WRITES
    select CACHE_MRC_SETTINGS
    select MRC_SETTINGS_PROTECT
-	select CPU_INTEL_COMMON
    select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
    select SUPPORT_CPU_UCODE_IN_CBFS
    select HAVE_SMI_HANDLER
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index d36e214..52896b9 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -65,7 +65,6 @@
    select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH
    select BOOT_DEVICE_SUPPORTS_WRITES
    select CACHE_MRC_SETTINGS
-	select CPU_INTEL_COMMON
    select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
    select FSP_COMPRESS_FSP_S_LZMA
    select FSP_M_XIP
diff --git a/src/soc/intel/common/block/cpu/Kconfig b/src/soc/intel/common/block/cpu/Kconfig
index 3c29b24..094cf05 100644
--- a/src/soc/intel/common/block/cpu/Kconfig
+++ b/src/soc/intel/common/block/cpu/Kconfig
@@ -1,6 +1,7 @@
 config SOC_INTEL_COMMON_BLOCK_CPU
    bool
    default n
+	select CPU_INTEL_COMMON
    help
      This option selects Intel Common CPU Model support code
      which provides various CPU related APIs which are common
diff --git a/src/soc/intel/denverton_ns/Kconfig b/src/soc/intel/denverton_ns/Kconfig
index e6d3237..3fce223 100644
--- a/src/soc/intel/denverton_ns/Kconfig
+++ b/src/soc/intel/denverton_ns/Kconfig
@@ -16,7 +16,6 @@
    select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH
    select BOOT_DEVICE_SUPPORTS_WRITES
    select DEBUG_GPIO
-	select CPU_INTEL_COMMON
    select SOC_INTEL_COMMON
    select SOC_INTEL_COMMON_RESET
    select PLATFORM_USES_FSP2_0
diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig
index 2aeb6d6..8a98304 100644
--- a/src/soc/intel/icelake/Kconfig
+++ b/src/soc/intel/icelake/Kconfig
@@ -15,7 +15,6 @@
    select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH
    select BOOT_DEVICE_SUPPORTS_WRITES
    select CACHE_MRC_SETTINGS
-	select CPU_INTEL_COMMON
    select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
    select FSP_M_XIP
    select GENERIC_GPIO_LIB
diff --git a/src/soc/intel/jasperlake/Kconfig b/src/soc/intel/jasperlake/Kconfig
index fd5648f..d172322 100644
--- a/src/soc/intel/jasperlake/Kconfig
+++ b/src/soc/intel/jasperlake/Kconfig
@@ -15,7 +15,6 @@
    select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH
    select BOOT_DEVICE_SUPPORTS_WRITES
    select CACHE_MRC_SETTINGS
-	select CPU_INTEL_COMMON
    select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
    select FSP_COMPRESS_FSP_S_LZ4
    select FSP_M_XIP
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index 9f9cb18..adb43ad 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -26,7 +26,6 @@
    select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH
    select BOOT_DEVICE_SUPPORTS_WRITES
    select CACHE_MRC_SETTINGS
-	select CPU_INTEL_COMMON
    select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
    select CPU_INTEL_COMMON_HYPERTHREADING
    select FSP_M_XIP
diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig
index 8718f97..de92090 100644
--- a/src/soc/intel/tigerlake/Kconfig
+++ b/src/soc/intel/tigerlake/Kconfig
@@ -15,7 +15,6 @@
    select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH
    select BOOT_DEVICE_SUPPORTS_WRITES
    select CACHE_MRC_SETTINGS
-	select CPU_INTEL_COMMON
    select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
    select FSP_COMPRESS_FSP_S_LZ4
    select FSP_M_XIP
diff --git a/src/soc/intel/xeon_sp/Kconfig b/src/soc/intel/xeon_sp/Kconfig
index 31d12fc..a4274df 100644
--- a/src/soc/intel/xeon_sp/Kconfig
+++ b/src/soc/intel/xeon_sp/Kconfig
@@ -31,7 +31,6 @@
    select ARCH_VERSTAGE_X86_32
    select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH
    select BOOT_DEVICE_SUPPORTS_WRITES
-	select CPU_INTEL_COMMON
    select SOC_INTEL_COMMON
    select SOC_INTEL_COMMON_RESET
    select FSP_PLATFORM_MEMORY_SETTINGS_VERSIONS

[Michael Niewöhner (Code Review)]

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45042 )

Change subject: soc/intel: Factor out `select CPU_INTEL_COMMON`
......................................................................

Patch Set 1: Code-Review-1

I'm surprised that build bot didn't fail, since set_feature_ctrl_vmx from src/cpu/intel/common/common_init.c is getting used in src/soc/intel/skylake/cpu.c.

Further, the CPPC code is getting used in SKL and after CB:45536 in the other socs, too

[Michael Niewöhner (Code Review)]

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45042 )

Change subject: soc/intel: Factor out `select CPU_INTEL_COMMON`
......................................................................

Patch Set 1:

(1 comment)

https://review.coreboot.org/c/coreboot/+/45042/1/src/soc/intel/skylake/cpu.c 
File src/soc/intel/skylake/cpu.c:

https://review.coreboot.org/c/coreboot/+/45042/1/src/soc/intel/skylake/cpu.c... 
PS1, Line 258: 	set_feature_ctrl_vmx();
this is in src/cpu/intel/common/common_init.c ... Why does buildbot not fail? o.O

[Michael Niewöhner (Code Review)]

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45042 )

Change subject: soc/intel: Factor out `select CPU_INTEL_COMMON`
......................................................................

Patch Set 1: Code-Review+2

Forget what I said, I missed the change in soc/intel/common :-)

[Michael Niewöhner (Code Review)]

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45042 )

Change subject: soc/intel: Factor out `select CPU_INTEL_COMMON`
......................................................................

Patch Set 1:

(1 comment)
> Patch Set 1: Code-Review-1
>
> I'm surprised that build bot didn't fail, since set_feature_ctrl_vmx from src/cpu/intel/common/common_init.c is getting used in src/soc/intel/skylake/cpu.c.
>
> Further, the CPPC code is getting used in SKL and after CB:45536 in the other socs, too

https://review.coreboot.org/c/coreboot/+/45042/1/src/soc/intel/skylake/cpu.c 
File src/soc/intel/skylake/cpu.c:

https://review.coreboot.org/c/coreboot/+/45042/1/src/soc/intel/skylake/cpu.c... 
PS1, Line 258: 	set_feature_ctrl_vmx();
> this is in src/cpu/intel/common/common_init.c ... Why does buildbot not fail? o. […]

Invalid. I missed the Kconfig change in soc/intel/common

[Michael Niewöhner (Code Review)]

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45042 )

Change subject: soc/intel: Factor out `select CPU_INTEL_COMMON`
......................................................................

Patch Set 1:

can be rebased, when CB:46474 is in :-)

[Angel Pons (Code Review)]

Angel Pons has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/45042 )

Change subject: soc/intel: Factor out `select CPU_INTEL_COMMON`
......................................................................

Abandoned